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* [DYNACACHE] Introduced DynaCache for ARM64 (disabled by default)ptitSeb2025-06-191-9/+9
* [DYNACACHE] More work on dynache relocationptitSeb2025-06-151-2/+13
* [DYNACACHE] More work on preparing internal reloc, plus fix non-trace buildptitSeb2025-06-131-0/+1
* [DYNAREC] Better handling of self-loop and added CALLRET=2 settings (ARM64 on...ptitSeb2025-04-091-0/+2
* [DYNAREC] Fixed inst_size building that could be wrong when dynablock was sto...ptitSeb2025-02-091-1/+1
* Fixes (#1659)rajdakin2024-07-091-2/+2
* [ARM64_DYNAREC] Fixed YMM cache handling, espcially in high pressure regs casesptitSeb2024-06-071-0/+1
* Merge pull request #896 from josch/exeptitSeb2023-07-211-0/+0
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| * remove executable bitsJohannes Schauer Marin Rodrigues2023-07-211-0/+0
* | [DYNAREC] Small improvment on instruction size array memory allocationptitSeb2023-06-251-2/+2
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* [DYNAREC] General fixes and improvment for multithread and jit program. Helps...ptitSeb2023-04-161-2/+2
* [ARM64_DYNAREC] Some small cleanupptitSeb2023-03-161-1/+1
* [ARM64_DYNAREC] Removed child leftover, it's not implemented anymoreptitSeb2023-03-131-2/+0
* [DYNAREC] Optimized FillBlock64 to avoid 3 for loop on all block instructions...ptitSeb2023-02-191-4/+8
* Remove dynablocklist (#438)ptitSeb2022-10-311-1/+0
* [DYNAREC] Improved handlinf of RIP valueptitSeb2022-07-161-1/+1
* [DYNAREC] Refactored dynarec, using box86 refactorptitSeb2022-04-091-2/+8
* [DYNAREC] Refactored dynarec to ease the future adding of new target architec...ptitSeb2022-02-271-0/+11