about summary refs log tree commit diff stats
path: root/src/dynarec/arm64 (follow)
Commit message (Expand)AuthorAgeFilesLines
* [ARM64_DYNAREC] Made REP MOVSB optimisation flaglessptitSeb2025-04-231-4/+4
* [ARM64_DYNAREC] Optimized REP STOSBptitSeb2025-04-232-2/+36
* [ARM64_DYNAREC] Various improvment to various SSE/AVX 128bits/256bits mov op...ptitSeb2025-04-238-89/+144
* [DYNAREC] Added a x87pc test and some cosmetic changes too (#2561)Yang Liu2025-04-228-83/+42
* [ARM64_DYNAREC] Improved (V)[MIN/MAX][S/P][S/D] opcodesptitSeb2025-04-224-34/+10
* [ARM64_DYNAREC] Small improvements to (V)MASKMOVDQU opcodeptitSeb2025-04-212-6/+4
* [ARM64_DYNAREC] Better handling of x87double=2ptitSeb2025-04-2110-0/+53
* [ARM64_DYNAREC] Fixed potential issue with (V)LDDQU opcodeptitSeb2025-04-212-3/+3
* [DYNAREC] More handling of low precision x87 flag change (#2556)Yang Liu2025-04-211-0/+1
* [ARM64_DYNAREC] Add/Improved (V)H[ADD/SUB]P[S/D] opcodesptitSeb2025-04-216-23/+53
* [ARM64_DYNAREC] Small change to 66 0F 3A 17 opcodeptitSeb2025-04-211-2/+2
* [ARM64_DYNAREC] Minor cosmetic changesptitSeb2025-04-212-2/+2
* [RV64_DYNAREC] Added X87DOUBLE=2 support (#2553)Yang Liu2025-04-217-13/+15
* [ARM64_DYNAREC] Another potential fix for X87DOUBLE=2ptitSeb2025-04-211-1/+1
* [ARM64_DYNAREC] Fixed some potential issues with BOX64_DYNAREC_DOUBLE=2ptitSeb2025-04-213-4/+1
* [WOW64] Finished skeleton code for PE build (#2542)Yang Liu2025-04-171-1/+0
* [ARM64_DYNAREC] More handling of low precision x87 flag changeptitSeb2025-04-163-0/+4
* [DYNAREC] Introduce BOX64_DYNAREC_X87DOUBLE=2 to handle Low Precision x87 ([A...ptitSeb2025-04-1612-17/+93
* [ARM64_DYNAREC][TRACE][COSIM] Improve x87 fiability in dynarec trace and cosi...ptitSeb2025-04-151-1/+1
* [ARM64_DYNAREC][TRACE] Changed TBZ/TBNZ printer to print bit offset in decimalptitSeb2025-04-151-2/+2
* [ARM64_DYNAREC] Added 67 0F 29 opcodeptitSeb2025-04-152-0/+41
* [WOW64] More tweaks for PE build (#2528)Yang Liu2025-04-144-11/+10
* [WOW64] Splitted freq and cleanup functions from x64emu (#2521)Yang Liu2025-04-111-2/+2
* [ARM64_DYNAREC] Some more FRINTTS and AVX/SSE fixes (might help #2520)ptitSeb2025-04-115-30/+22
* [WOW64] More tweaks towards PE build (#2519)Yang Liu2025-04-101-1/+1
* [WOW64] More work on the PE wow64 build (#2518)Yang Liu2025-04-103-1/+8
* [DYNAREC] Better handling of self-loop and added CALLRET=2 settings (ARM64 on...ptitSeb2025-04-097-7/+52
* [ARM64_DYNAREC] Fixed some dangling else warnings (#2514)Yang Liu2025-04-091-6/+18
* [ARM4_DYNAREC] A few changes to seem SSE/AVX comparison and convertions opcod...ptitSeb2025-04-048-154/+287
* [ARM64_DYNAREC] Small adjustement to 2 AVX opcodesptitSeb2025-04-041-3/+3
* Decoupled alternate functions from bridge (#2500)Yang Liu2025-04-031-0/+1
* Moved more functions to os.h (#2497)Yang Liu2025-04-0337-43/+7
* [ARM64_DYNAREC] Removed some condition on vex.l that shouldn't be here on a f...ptitSeb2025-04-032-6/+6
* [ARM64_DYNAREC] Small optim for VBLENDPS opcodeptitSeb2025-04-021-6/+14
* [ARM64_DYNAREC] Fixed an optim in BLENDPS opcodeptitSeb2025-04-021-2/+2
* Introduced box64cpu.h for exported interpreter and dynarec functions (#2490)Yang Liu2025-04-0143-84/+42
* Some cosmetic changes to C header files (#2487)Yang Liu2025-04-011-1/+1
* [ARM64] Use crc32 hardware support (if available) for dynablock signatureptitSeb2025-03-311-0/+22
* [ARM64_DYNAREC] Added atomic support for various lock helpersptitSeb2025-03-302-0/+129
* [ARM64_DYNAREC] Fixed a potential issue with SSE regs when internal jumping t...ptitSeb2025-03-292-3/+24
* [ARM64_DYNAREC] Added fastnan=0 path for HSUBPS opcodeptitSeb2025-03-261-0/+13
* [ARM64_DYNAREC] Improved VHSUBPS opcode, and added fastnan=0 pathptitSeb2025-03-261-13/+16
* [ARM64_DYNAREC] Commented a message that doesn't seems releventptitSeb2025-03-261-2/+2
* [COSIM] Changed how F0 LOCK opcodes are skipped in COSIMptitSeb2025-03-261-1/+1
* [ARM64_DYNAREC] Improved (V)HADDPS with fastnan=0ptitSeb2025-03-262-4/+39
* [ARM64_DYNAREC] Addedfastnan=0 code to (V)SQRTPS opcodesptitSeb2025-03-262-4/+30
* [ARM64_DYNAREC] Improved (V)MAXP[S/D] and (V)MINP[S/D] opcodes to more closel...ptitSeb2025-03-264-40/+47
* [ARM64_DYNAREC] Small change on AVX.66.0F38 BA opcode to more closely match x...ptitSeb2025-03-261-3/+11
* [ARM64_DYNAREC] Better log for arch_populate buffer being undersizedptitSeb2025-03-221-3/+2
* [ARM64_DYNAREC] Fixed potential issue on unligned path being marked while dyn...ptitSeb2025-03-222-4/+4