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path: root/src/dynarec/dynarec_arm64_0f.c (follow)
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* [DYNAREC] Refactored dynarec to ease the future adding of new target architec...ptitSeb2022-02-271-1911/+0
* [DYNAREC] Added 0F 3A 0F opcodeptitSeb2022-02-131-0/+24
* [DYNAREC] Pass0 now alocate memory and do more stuff from pass1ptitSeb2021-11-111-12/+10
* [DYNAREC] Fixed (agaim) BTR/BTS/BTC with imm8==0ptitSeb2021-09-041-0/+6
* [DYNAREC] Fixed BTS/BTR/BTC with imm8==0 (helps EWJ SE Win95, probably other ...ptitSeb2021-08-291-6/+15
* Added dummy 0F 09 opcode ([DYNAREC] too) (for #34)ptitSeb2021-07-071-0/+4
* Added 0F D7 opcode ([DYNAREC] too) (for #32)ptitSeb2021-07-061-1/+17
* [DYNAREC] Added a faked 0F 01 opcode to avoid break of dynarec blockptitSeb2021-07-051-0/+10
* [DYNAREC] Added 0F 05 opcode (for Wine64 and probbly a few others)ptitSeb2021-07-051-0/+16
* Added 0F C3 opcode ([DYNAREC] too) (for #20)ptitSeb2021-07-051-1/+11
* [DYNAREC] Small optim on shl/shr 16bits, and marked all opcode that need opti...ptitSeb2021-06-181-0/+3
* [DYNAREC] Improved UD2 handlingptitSeb2021-06-151-0/+2
* [DYNAREC] Added shrd32c emiter and 0F AC opcodeptitSeb2021-06-141-1/+10
* [DYNAREC] Added message Need Optim on SH(L/R)D Ed, Gd, CL opcodeptitSeb2021-06-141-0/+2
* [DYNAREC] Added shld32c emiter and 0F A4 opcodeptitSeb2021-06-141-1/+10
* [DYNAREC] Added 0F 2B opcodeptitSeb2021-06-141-0/+15
* [DYNAREC] Small optim for PSHUFW opcodeptitSeb2021-06-131-0/+21
* [DYNAREC] Various small fixes to flags handlingptitSeb2021-06-051-5/+5
* Fixed BT/BTC/BTR/BTS opcodes ([DYNAREC] too)ptitSeb2021-06-051-25/+23
* Added 0F 0D /1 opcode ([DYNAREC] too)ptitSeb2021-05-281-0/+13
* [DYNAREC] Added 0F 50/52/53 opcodesptitSeb2021-05-171-2/+63
* [DYNAREC] Added 0F 64/65/66/6B/72/75/76/D3/F5 opcodesptitSeb2021-04-181-3/+123
* Second passrajdakin2021-04-141-15/+13
* [DYNAREC] Added 0F F2 opcodeptitSeb2021-04-111-0/+12
* [DYNAREC] Added 0F 74 opcodeptitSeb2021-04-111-0/+7
* [DYNAREC] Added 0F 63 opcodeptitSeb2021-04-111-0/+10
* [DYNAREC] Added 0F E3 opcodeptitSeb2021-04-111-0/+8
* [DYNAREC] Added 0F DE/DF opcodesptitSeb2021-04-111-1/+14
* Added 0F DA ocode ([DYNAREC] too)ptitSeb2021-04-071-1/+7
* [DYNAREC] Better 0F 77 EMMS emulationptitSeb2021-04-031-1/+1
* [DYNAREC] Fixed 0F 5D/5F/6E/6F opcodesptitSeb2021-04-021-9/+9
* [DYNAREC] Added 0F E8/E9 opcodes and fixed 0F E7 opcodeptitSeb2021-04-021-8/+22
* [DYNAREC] Added 0F D8/D9/DC/DD opcodesptitSeb2021-04-021-0/+29
* [DYNAREC] Added 0F DB opcodeptitSeb2021-04-021-0/+8
* [DYNAREC] Added 0F 73 opcodeptitSeb2021-04-021-0/+34
* [DYNAREC] Added 0F 38 00 opcodeptitSeb2021-04-021-0/+10
* [DYNAREC] Added 0F 38 0B opcodeptitSeb2021-04-021-0/+8
* Added 0F E0 opcode ([DYNAREC] too)ptitSeb2021-04-021-0/+8
* Added 0F E7 opcode ([DYNAREC] too)ptitSeb2021-04-021-0/+13
* [DYNAREC] Added 0F 51 opcodeptitSeb2021-04-011-0/+8
* Added 0F 31 opcode ([DYNAREC] too)ptitSeb2021-04-011-0/+7
* [DYNAREC] Small optim of 0F 6E opcodeptitSeb2021-04-011-5/+14
* [DYNAREC] Added 0F 68/69/6A opcodesptitSeb2021-03-311-0/+21
* [DYNAREC] Added 0F E5 opcodeptitSeb2021-03-311-0/+10
* [DYNAREC] Added 0F F8/F9/FA opcodeptitSeb2021-03-311-0/+22
* [DYNAREC] Added 66 0F D5 and 0F D5 opcodes and fixed F2 0F 70 opcodeptitSeb2021-03-311-0/+8
* [DYNAREC] Added 0F FC/FD/FE opcodeptitSeb2021-03-311-0/+22
* [DYNAREC] Added 0F 70 opcodeptitSeb2021-03-311-1/+61
* [DYNAREC] Added 0F C4/C5 opcodeptitSeb2021-03-311-0/+28
* [DYNAREC] Added 0F F6 opcodeptitSeb2021-03-311-0/+13