about summary refs log tree commit diff stats
path: root/src/dynarec/dynarec_arm64_660f.c (follow)
Commit message (Expand)AuthorAgeFilesLines
* [DYNAREC] Refactored dynarec to ease the future adding of new target architec...ptitSeb2022-02-271-1946/+0
* [DYNAREC] Small change to unused PRECISE_CVT partptitSeb2022-01-071-3/+3
* [DYNAREC] Oops, fixed 66 0F D1/D2 opcodesptitSeb2022-01-061-2/+2
* [DYNAREC] Added 66 0F D1 opcode and improved 66 0F D2 opcodeptitSeb2022-01-061-5/+12
* [DYNAREC] Added 66 0F E3 opcodeptitSeb2022-01-061-1/+21
* Added 66 0F 38 39/3C opcodes ([DYNAREC] too) (for #81)ptitSeb2021-09-181-0/+16
* Fixed 66 0F 3A 22 opcode for REX.W ([DYNAREC] too) (should help #81)ptitSeb2021-09-161-1/+5
* Added 66 0F 3A 22 SSE4.x opcode ([DYNAREC] too) (for #106)ptitSeb2021-08-301-0/+10
* Added 66 0F B7 opcode ([DYNAREC] too)ptitSeb2021-08-291-0/+14
* Added AES-NI cpu extension support ([DYNAREC] too, using AES extension if ava...ptitSeb2021-08-281-0/+101
* Added 66 0F C8..CF opcodes ([DYNAREC] too)ptitSeb2021-07-091-0/+18
* [DYNAREC] Added 66 0F D2 opcodes (for geekbench5)ptitSeb2021-07-081-0/+12
* [DYNAREC] Added 66 0F EE opcodes (for geekbench5)ptitSeb2021-07-081-1/+7
* [DYNAREC] Added 66 0F 50 opcode, and changed a bit 66 0F D7 (for CB15)ptitSeb2021-07-061-24/+32
* Added 66 0F 38 08/09/0A opcodes ([DYNAREC] too) (for #32 / Zoom)ptitSeb2021-07-051-0/+45
* [DYNAREC] Added 66 0F 5E opcode (for CB15)ptitSeb2021-07-051-1/+7
* [DYNAREC] Added 66 0F C2 opcode (for CB15)ptitSeb2021-07-051-0/+32
* Added 66 0F 38 1C/1D/1E opcodes ([DYNAREC] too) (for #17 / Zoom)ptitSeb2021-07-051-0/+25
* [DYNAREC] Added 66 0F D7 opcode (for CB15)ptitSeb2021-07-051-2/+28
* [DYNAREC] Small optim on shl/shr 16bits, and marked all opcode that need opti...ptitSeb2021-06-181-0/+2
* [DYNAREC] Added 66 0F F7 opcodeptitSeb2021-06-141-1/+17
* Added 66 0F 3A 0B opcode ([DYNAREC] too)ptitSeb2021-06-141-0/+19
* Added 66 0F 38 20..25 SSE4 opcodes ([DYNAREC] too)ptitSeb2021-06-141-0/+47
* [DYNAREC] Fix special case of PSHUFD on memory with Ib=0 (fixed the Blankscre...ptitSeb2021-06-131-1/+1
* [DYNAREC] Small optim on PSUHFD opcodeptitSeb2021-06-131-5/+30
* [DYNAREC] Fixed a few opcodes: BTR/BTC/BTS 16bits, CVTTPD2DQ and PSHUF(L/H)WptitSeb2021-06-121-23/+6
* [DYNAREC] Various small fixes to flags handlingptitSeb2021-06-051-4/+4
* Fixed BT/BTC/BTR/BTS opcodes ([DYNAREC] too)ptitSeb2021-06-051-11/+58
* [DYNAREC] Added 66 0F E7 opcodeptitSeb2021-05-301-1/+12
* [DYNAREC] Added 66 0F D3/F3 opcodesptitSeb2021-05-171-1/+20
* Added 66 0F B6 opcode ([DYNAREC] too)ptitSeb2021-05-161-0/+21
* Second passrajdakin2021-04-141-4/+6
* [DYNAREC] Added 66 0F 5D/5F opcodesptitSeb2021-04-121-0/+14
* [DYNAREC] Added 66 0F E1/F2 opcodeptitSeb2021-04-111-0/+28
* [DYNAREC] Added 66 0F DA opcodeptitSeb2021-04-111-1/+7
* [DYNAREC] Added 66 0F E2 ocpodeptitSeb2021-04-111-0/+14
* [DYNAREC] Added 66 0F E0 opcodeptitSeb2021-04-021-0/+8
* Added 66 0F 38 0B opcode ([DYNAREC] too)ptitSeb2021-04-021-0/+8
* [DYNAREC] Added 66 0F E6 opcodeptitSeb2021-04-011-0/+25
* [DYNAREC] Added 66 0F 5C opcodeptitSeb2021-04-011-0/+7
* [DYNAREC] Added 66 0F 58/59 opcodeptitSeb2021-04-011-1/+14
* [DYNAREC] Added 66 0F F5 opcodeptitSeb2021-04-011-1/+11
* [DYNAREC] Added 66 0F C6 opcodeptitSeb2021-04-011-0/+20
* Added 66 0F 3A 0F opcode ([DYNAREC] too)ptitSeb2021-04-011-0/+24
* [DYNAREC] Added 66 0F D5 and 0F D5 opcodes and fixed F2 0F 70 opcodeptitSeb2021-03-311-1/+7
* [DYNAREC] Added 66 0F 63 opcodeptitSeb2021-03-311-1/+12
* [DYNAREC] Added 66 0F E5 opcodeptitSeb2021-03-311-0/+12
* [DYNAREC] Added 66 0F E8/E9/EA opcodesptitSeb2021-03-311-0/+21
* [DYNAREC] Added 66 0F DC/DD/DE opcodesptitSeb2021-03-311-1/+21
* [DYNAREC] Added 66 0F D8/D9 opcodesptitSeb2021-03-311-0/+15