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* [RV64_DYNAREC] Fixed some 16bit BT/BTS/BTR/BTC opcodes (#3062)Yang Liu2025-10-121-47/+135
* [DYNAREC][INTERP] Added a few multibyte nops (#3046)Yang Liu2025-10-101-0/+5
* RV64_DYNAREC] Added more avx scalar opcodes (#3029)Yang Liu2025-09-221-2/+2
* [RV64_DYNAREC] Added more scalar avx opcodes (#2971)Yang Liu2025-08-251-1/+1
* [RV64_DYNAREC] Added more scalar avx 66 0F opcodes (#2960)Yang Liu2025-08-221-1/+1
* [DYNACACHE] Refactored cpu extension, will be used in dynacache signature checksptitSeb2025-06-141-20/+20
* [RV64_DYNAREC] Optimized CLZ macro with xtheadbb (#2664)Yang Liu2025-05-231-2/+2
* [RV64_DYNAREC] Optimized some opcodes with xtheadbb (#2663)Yang Liu2025-05-231-8/+13
* [RV64_DYNAREC] Fixed more potential scratch register conflicts (#2652)Yang Liu2025-05-201-1/+1
* Moved more functions to os.h (#2497)Yang Liu2025-04-031-1/+0
* Introduced box64cpu.h for exported interpreter and dynarec functions (#2490)Yang Liu2025-04-011-2/+1
* [INTERP] Added more nops ([DYNAREC] too) (#2378)Yang Liu2025-02-171-0/+1
* [INTERP] Added 66 0F 19 NOP opcode ([DYNAREC] too) (#2375)Yang Liu2025-02-171-0/+1
* [RV64_DYNAREC] Minor fixes and improvements on various opcodes (#2331)Yang Liu2025-02-081-23/+29
* [ENV] Initial refactor of env variables infrastructure (#2274)Yang Liu2025-01-211-22/+22
* [RV64_DYNAREC] Fixed nativeflags tmp register usage (#2199)Yang Liu2024-12-241-0/+3
* [RV64_DYNAREC] New register mapping (#2139)Yang Liu2024-12-121-2/+2
* [DYNAREC] Introduced TO_NAT to ease register mapping changes in future (#2111)Yang Liu2024-12-051-32/+24
* [RV64_DYNAREC] Added simple opcodes fusion as "native flags" (#2102)Yang Liu2024-12-021-35/+37
* [RV64_DYNAREC] Added, fixed, and optimized opcodes (#2059)xctan2024-11-241-0/+14
* [DYNAREC] Reuse strongmem infra for all backends (#2052)Yang Liu2024-11-211-1/+1
* [RV64_DYNAREC] Added more MMX opcodes for vector (#2024)xctan2024-11-131-2/+2
* [RV64_DYNAREC] Fixed 66 0F C2 CMPPD opcode for scalar and more (#1975)Yang Liu2024-10-291-2/+2
* [RV64_DYNAREC] Split 660f.c to speedup compilation a bit (#1924)Yang Liu2024-10-111-1228/+22
* [RV64_DYNAREC] Fix some typos in docs and dynarec/rv64 (#1758)WANG Guidong2024-08-261-1/+1
* [RV64_DYNAREC] Added more opcodes (#1740)Yang Liu2024-08-161-31/+93
* [RV64_DYNAREC] Added 66 0F 3A 63 PCMPISTRI opcode (#1735)Yang Liu2024-08-161-5/+34
* [DYNAREC_RV64] Removed TODOs on GETEX and GETEM macros (#1720)Yang Liu2024-08-091-154/+153
* [RV64_DYNAREC] Fixed flag generation in IMUL/MUL opcode (#1715)xctan2024-08-081-1/+1
* [RV64_DYNAREC] Fixed some bugs for VMP (#1679)xctan2024-07-161-7/+7
* Fixes (#1659)rajdakin2024-07-091-1/+1
* Mask `rs2` when using `bext` instruction if `rex.w` is not set (#1653)Yip Coekjan2024-07-081-3/+8
* [RV64_DYNAREC] Added preliminary RVV infra and PXOR opcode for demonstration ...Yang Liu2024-07-041-12/+12
* [RV64_DYNAREC] Fixed some opcodes caught by cosim (#1561)xctan2024-06-061-11/+14
* [RV64_DYNAREC] Added more MMX opcodes and some optimizations too (#1557)xctan2024-06-031-12/+12
* [RV64_DYNAREC] Added more MMX opcodes and some optimizations too (#1542)xctan2024-05-311-13/+65
* [RV64_DYNAREC] Added more MMX opcodes and some optimizations too (#1539)xctan2024-05-301-33/+83
* Added more MMX opcodes and some optimizations too (#1537)xctan2024-05-301-22/+61
* [RV64_DYNAREC] Added more MMX opcodes and some optimizations too (#1535)xctan2024-05-281-14/+21
* [RV64_DYNAREC] Fixed some bit manipulation opcodesptitSeb2024-05-201-2/+8
* [RV64_DYNAREC] Improved/fixed flag handling (ported from ARM64_DYNAREC)ptitSeb2024-04-301-1/+1
* [RV64_DYNAREC] Added 66 0F 38 61 PCMPESTRI opcode and some refactors too (#1337)Yang Liu2024-03-061-34/+42
* [RV64_DYNAREC] Added all missing 66 0F opcodes for test17 (#1281)Yang Liu2024-02-231-1/+91
* [RV64_DYNAREC] Added 2 more 66 0F opcodes for test17 (#1278)Yang Liu2024-02-221-18/+60
* [RV64_DYNAREC] Added more opcodes (#1277)Yang Liu2024-02-221-0/+11
* [DYNAREC_RV64] Added more opcodes and some minor optimizations (#1272)Yang Liu2024-02-201-2/+1
* [RV64_DYNAREC] Fixed 66 0F B6 MOVZX opcode (#1196)xctan2024-01-111-0/+1
* [DYNAREC_RV64] Added more opcodes for VMP-protected GI (#1168)xctan2023-12-261-36/+119
* [DYNAREC_RV64] Added more opcodes for VMP-protected GI (#1164)xctan2023-12-251-0/+194
* [DYNAREC_RV64] Added more opcodes and fixes (#1154)Yang Liu2023-12-221-1/+12