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* [RV64_DYNAREC] Fixed a regression in #2187 (#2203)Yang Liu2024-12-241-2/+8
* [LA64_DYNAREC] Added nativeflags support (#2202)Yang Liu2024-12-2423-738/+1174
* [LA64_DYNAREC] Fixed 66 0F PTEST opcode (#2201)Yang Liu2024-12-241-3/+7
* [LA64_DYNAREC] Small optim to MOVHPS (#2200)Yang Liu2024-12-242-3/+6
* [RV64_DYNAREC] Fixed nativeflags tmp register usage (#2199)Yang Liu2024-12-243-107/+117
* [ARM64_DYNAREC] a bit more work on df=0 (still WIP)ptitSeb2024-12-242-1/+2
* [LA64_DYNAREC] Fixed various issues in LBT path (#2197)Yang Liu2024-12-233-48/+39
* [ARM64_DYNAREC] Added work in progress BOX64_DYNAREC_DF env. var.ptitSeb2024-12-233-6/+11
* [LA64_DYNAREC] Fixed some LBT path issues (#2193)Yang Liu2024-12-231-1/+2
* [LA64_DYNAREC] Optimized some 16bit shift opcodes (#2192)Yang Liu2024-12-233-33/+261
* [LA64_DYNAREC] Fixed 32bit ADDIz and SUBz (#2191)Yang Liu2024-12-231-4/+6
* [RV64_DYNAREC] Small optim to emit_and32c (#2189)Yang Liu2024-12-221-1/+1
* [RV64_DYNAREC] Added a fast path to SHR Ew, Ib (#2188)Yang Liu2024-12-222-7/+19
* [RV64_DYNAREC] Made nativeflags works with 8/16bit fast path (#2187)Yang Liu2024-12-221-46/+48
* [ARM64_DYNAREC] Reworked MUL/IMUL opcodes a bitptitSeb2024-12-226-41/+162
* [GDBJIT] Display register mapping annotations (#2185)Yang Liu2024-12-225-7/+276
* [GDBJIT] Unified the experience for all the backends (#2183)Yang Liu2024-12-213-141/+116
* [ARM64_DYNAREC] Improved DMB/DSB printerptitSeb2024-12-211-4/+16
* [LA64_DYNAREC] Added ROUNDSD and CVTDQ2PD opcodes (#2173)Leslie Zhai2024-12-203-0/+34
* Simplified ucontext uc_link managment (closer to glibc handling) ([BOX32] too)ptitSeb2024-12-201-13/+0
* [GDBJIT] Display DynaRec info in source file (#2179)Yang Liu2024-12-204-89/+104
* [LA64_DYNAREC] A few minor optimizations (#2174)Yang Liu2024-12-192-6/+3
* [LA64_DYNAREC] Added CLC and PMOVZXBW opcodes (#2172)Leslie Zhai2024-12-192-0/+16
* [LA64_DYNAREC] Fix VPICKVE2GR_WU typo (#2171)Leslie Zhai2024-12-191-4/+4
* [RV64_DYNAREC] Fixed 32bits SUBz (#2170)Yang Liu2024-12-181-1/+9
* [RV64_DYNAREC] Added more LOCK prefix opcodes (#2169)Yang Liu2024-12-181-0/+79
* [RV64_DYNAREC] Fixed 32bit ADDIz (#2168)Yang Liu2024-12-181-1/+9
* [RV64_DYNAREC] Fixed CMPXCHG8B (#2167)Yang Liu2024-12-181-5/+5
* [RV64_DYNAREC] Added unaligned support to CMPXCHG8B opcode (#2166)Yang Liu2024-12-183-69/+101
* [GDBJIT] Refined RV64 and LA64 support (#2165)Yang Liu2024-12-183-4/+8
* [LA64_DYNAREC] Added POPCNT opcode and fixed an issue too (#2164)Yang Liu2024-12-183-3/+55
* [GDBJIT] Show x64pc in gdb, also added documentation (#2163)Yang Liu2024-12-181-1/+1
* Added initial GDBJIT support (#2162)Yang Liu2024-12-178-1/+29
* [RV64_DYNAREC] Extended simple wrapper for more int types (#2160)xctan2024-12-172-2/+9
* [LA64_DYNAREC] Added PTEST opcode (#2158)Leslie Zhai2024-12-162-0/+35
* [RV64_DYNAREC] Fixed more regressions (#2157)Yang Liu2024-12-152-5/+4
* [RV64_DYNAREC] Optimize push/pop with xtheadmemidx (#2150)Yang Liu2024-12-131-28/+98
* [RV64_DYNAREC] Fixed some TO_NAT usages (#2149)Yang Liu2024-12-131-4/+4
* [RV64_DYNAREC] Reinitialize sew after callret (#2148)Yang Liu2024-12-131-27/+14
* [RV64_DYNAREC] Reworked ZEROUP and freed t0 (#2147)xctan2024-12-1214-80/+74
* [RV64_DYNAREC] New register mapping (#2139)Yang Liu2024-12-1223-595/+596
* [LA64_DYNAREC] Added more opcodes (#2145)Leslie Zhai2024-12-123-0/+64
* [ARM64_DYNAREC] Force flags to be at least defered when priv opcode is run on...ptitSeb2024-12-113-15/+75
* [DYNAREC] Small improvments on flags when end of block if trigger earlyptitSeb2024-12-112-5/+4
* [ARM64_DYNAREC] Better hadnling of flags on btx opcode familly ([COSIM] and i...ptitSeb2024-12-113-50/+222
* [COSIM] Try to get more stable result on x87 stacks by unwinding status befor...ptitSeb2024-12-118-1/+44
* [LA64_DYNAREC] Added more 660F opcodes (#2127)Leslie Zhai2024-12-103-1/+248
* [INTERPRETER] Added 64bits 67 A1 opcode ([ARM64_DYNAREC] Too)ptitSeb2024-12-091-0/+10
* [LA64_DYNAREC] Added AES opcodes (#2122)Leslie Zhai2024-12-071-0/+76
* [DYNAREC] Fixed a typo which leads to regression (#2121)Yang Liu2024-12-061-1/+1