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* [RV64_DYNAREC] Added more opcodes (#617)xctan2023-03-226-1/+128
* [RV64_DYNAREC] Improved handling of Float/Double cache on functions callsptitSeb2023-03-225-44/+95
* [RV64_DYNAREC] Added some x87 D9 opcodesptitSeb2023-03-224-1/+265
* [RV64_DYNAREC] Added more opcodes (#614)xctan2023-03-224-1/+135
* [RV64_DYNAREC] Fixed 88 MOV opcode (#613)Yang Liu2023-03-221-5/+6
* [RV64_DYNAREC] Added more opcode (#612)Yang Liu2023-03-224-4/+109
* [RV64_DYNAREC] Added AB STOSD opcode (#611)Yang Liu2023-03-222-2/+40
* [RV64_DYNAREC] Added x87/SSE/mmx infrastructure, and a few x87 D9 opcodesptitSeb2023-03-2111-40/+2081
* [RV64_DYNAREC] Added some opcodes (#608)xctan2023-03-213-6/+73
* [RV64_DYNAREC] Added B0 MOV opcode and small optim (#607)xctan2023-03-211-2/+16
* [RV64_DYNAREC] Fixed lr.d and sc.d instruction name in printer (#606)xctan2023-03-211-2/+2
* [RV64_DYNAREC] Added 19 SBB opcode (#605)Yang Liu2023-03-203-3/+54
* [RV64_DYNAREC] Added F0 0F C1 LOCK XADD opcode (#604)Yang Liu2023-03-205-3/+155
* [RV64_DYNAREC] Added 6B IMUL opcode (#603)xctan2023-03-201-0/+34
* [RV64_DYNAREC] Added C0 /{4,5,6,7} opcode (#601)xctan2023-03-202-0/+91
* [RV64_DYNAREC] Added {21,23} AND opcode (#602)xctan2023-03-201-0/+17
* [RV64_DYNAREC] Added more opcode (#600)Yang Liu2023-03-201-2/+39
* [RV64_DYNAREC] Added 66 89 MOV opcode (#599)Yang Liu2023-03-201-1/+21
* [RV64_DYNAREC] Added 66 3D CMP opcode (#598)Yang Liu2023-03-203-3/+81
* [RV64_DYNAREC] Added 80 /3 SBB opcode (#597)Yang Liu2023-03-206-36/+94
* [RV64_DYNAREC] Preparing float/double handlingptitSeb2023-03-202-28/+25
* [RV64_DYNAREC] Added 80 /4 AND opcode (#594)Yang Liu2023-03-203-1/+54
* [RV64_DYNAREC] Various fixes and improvements, getting dynarec more stable nowptitSeb2023-03-194-11/+45
* [RV64_DYNAREC] Various important fixesptitSeb2023-03-193-10/+18
* [RV64_DYNAREC] Added more opcode (#591)Yang Liu2023-03-197-6/+229
* Added FF /0 INC opcode (#592)xctan2023-03-193-2/+62
* [RV64_DYNAREC] Small optim on last_ipptitSeb2023-03-182-4/+14
* [RV64_DYNAREC] Fixed BF MOVSX opcode (#590)Yang Liu2023-03-181-1/+1
* [RV64_DYNAREC] Fixed Jcc opcodes for large blockptitSeb2023-03-184-5/+17
* [RV64_DYNAREC] Fixed 63 MOVSXD opcode (#589)Yang Liu2023-03-181-1/+1
* [RV64_DYNAREC] Fixed B6 MOVZX opcode (#588)Yang Liu2023-03-181-1/+1
* [RV64_DYNAREC] Added 33 XOR opcode (#587)Yang Liu2023-03-181-0/+8
* [RV64_DYNAREC] A8 TEST opcode (#586)Yang Liu2023-03-183-2/+37
* [RV64_DYNAREC] Some optims on XOR opcodesptitSeb2023-03-182-8/+8
* [ARM64_DYNAREC] Fixed some special cases for the Double Pop optim (fixed stea...ptitSeb2023-03-184-17/+20
* [RV64_DYNAREC] Fixed an issue with UFLAG_OP12 helper macroptitSeb2023-03-181-1/+1
* [RV64_DYNAREC] Added F7 except /3 opcodes, plus some fixes (and test05 run al...ptitSeb2023-03-184-13/+268
* [ARM64_DYNAREC] Fixed a potential issue with F7/7 IDIV opcodeptitSeb2023-03-181-2/+2
* [RV64_DYNAREC] Added 66 C1 opcodesptitSeb2023-03-182-0/+133
* [RV64_DYNAREC] Added 69 IMUL opcodeptitSeb2023-03-181-0/+33
* [RV64_DYNAREC] Added 0F BF MOVSX opcodeptitSeb2023-03-181-0/+16
* [RV64_DYNAREC] Added 0F BE MOVSX opcodeptitSeb2023-03-181-0/+24
* [RV64_DYNAREC] Added 66 C7 MOV opcodeptitSeb2023-03-181-0/+20
* [RV64_DYNAREC] Added 09 OR opcodeptitSeb2023-03-183-1/+44
* [RV64_DYNAREC] Added D3 /4 /5 SHL opcodeptitSeb2023-03-183-6/+61
* [RV64_DYNAREC] Added D3/7 SAR opcodeptitSeb2023-03-182-0/+27
* [RV64_DYNAREC] Added 99 CDQ opcodeptitSeb2023-03-181-1/+9
* [RV64_DYNAREC] Added 63 MOVSXD opcodeptitSeb2023-03-181-0/+23
* [RV64_DYNAREC] Added 88 MOV opcodeptitSeb2023-03-181-0/+39
* [RV64_DYNAREC] Added 83 /1 OR opcodeptitSeb2023-03-183-4/+48