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* [TRACE] Fixed the jump from instruction idx for Extend blcok in traceptitSeb2025-07-021-1/+1
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* [ARM64_DYNAREC] Optimized propate XMM/YMM unused helpersptitSeb2025-07-011-26/+11
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* [ARM64_DYNAREC] Fixed a regression introduced with ↵ptitSeb2025-06-301-1/+1
| | | | 4903177bab1f3324a0faeedd968fed5bf4ea8772 (for ForzaHorizon4, maybe other too)
* [DYNAREC] Refactor hotpage detection and dynarec_dirty 1 & 2. Also adjust ↵ptitSeb2025-06-303-14/+71
| | | | some launcher/games flags
* [ARM64_DYNAREC] Added 66 8D opcodeptitSeb2025-06-291-1/+16
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* [ARM64_DYNAREC] Added 67 9C opcodeptitSeb2025-06-291-0/+6
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* [ARM64_DYNAREC] Made (V)M(IN/AX)P(D/S) opcodes always exact, it's ↵ptitSeb2025-06-292-34/+14
| | | | inexpensive and make FASTNAN=0 less usefull
* [LA64_DYNAREC] Removed some TABLE64 usage (#2782)Yang Liu2025-06-271-21/+12
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* [LA64_DYNAREC] Add la64 avx load/store ops part 4. (#2775)phorcys2025-06-271-0/+252
| | | * VEX.66.0f.38 VMOVSX{BW,BD,BQ,WD,WQ,DQ}/VMOVZX{BW,BD,BQ,WD,WQ,DQ}
* [LA64_DYNAREC] Optimized GETIP macro (#2781)Yang Liu2025-06-276-51/+49
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* [LA64_DYNAREC] Removed some redundant macro definitions (#2778)Yang Liu2025-06-261-2/+0
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* [DYNACACHE][LA64] More work on internal reloc (#2779)Yang Liu2025-06-265-13/+23
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* [LA64_DYNAREC] Add la64 avx load/store ops part 3. (#2774)phorcys2025-06-266-10/+416
| | | | | * VEX.0f VMOVMSKPS * VEX.66.0f VMOVMSKPD/VPMOVMSKB/VMASKMOVDQU * VEX.66.0f.38 VMASKMOVPS/VMASKMOVPD/VPMASKMOVD/VPMASKMOVQ
* [LA64_DYNAREC] Add la64 avx load/store ops part 2. (#2773)phorcys2025-06-262-0/+113
| | | | * VEX.0f VMOVLPS/VMOVHPS/VMOVLHPS/VMOVHLPS * VEX.66.0f VMOVLPD/VMOVHPD
* [ARM64_DYNAREC] Fixed opcode name for VDIVPDptitSeb2025-06-251-1/+1
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* [ARM64_DYNAREC] Fixed some extended instance of VCMPSD opcodesptitSeb2025-06-251-3/+3
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* [INTERP] More work on UD flagsptitSeb2025-06-251-5/+17
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* [ARM64_DYNAREC] Adjusted some UD flags in BLSMSK opcodeptitSeb2025-06-251-4/+14
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* [ARM64_DYNAREC] Fixed CF flag of BLSI opcodeptitSeb2025-06-251-1/+1
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* [ARM64_DYNAREC] Fixed BEXTR opcodeptitSeb2025-06-251-11/+13
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* [ARM64_DYNAREC] Improved BTx opcodes (and fixed one BTC opcode)ptitSeb2025-06-241-41/+141
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* [DYNAREC] Better check of limit for a dynablockptitSeb2025-06-241-1/+1
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* [LA64_DYNAREC] Add la64 avx load/store ops part 1. (#2766)phorcys2025-06-245-12/+194
| | | | | | | * VEX.0f VMOVNTPS/VLDMXCSR/VSTMXCSR * VEX.66.0f VMOVNTPD/VMOVD/VMOVNTDQ * VEX.66.0f.3a VMOVNTDQA * VEX.f2.0f VMOVDDUP/VLDDQU * VEX.f3.0f VMOVSLDUP/VMOVSHDUP/VMOVD
* [ARM64_DYNAREC] Improved handling of last_ipptitSeb2025-06-244-1/+4
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* [DYNACACHE][LA64] Added const table for later use in internal relocation (#2770)Yang Liu2025-06-2412-69/+317
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* [LA64_DYNAREC] This should help certain builds (for #2769)ptitSeb2025-06-242-5/+10
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* [DYNAREC] Removed some unused code (#2767)Yang Liu2025-06-246-26/+0
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* [LA64_DYNAREC]Add basic avx support for la64. (#2745)phorcys2025-06-2315-70/+5578
| | | | | | | | | * basic infra for avx * some basic ops for avx VMOVDQU/VMOVDQA/VMOVUPS/VMOVAPS/VMOVUPD/VMOVAPD VZEROUPPER/VZEROALL VMOVD/VMOVSD/VMOVSS VINSERTF128/VINSERTI128/VEXTRACTF128/VEXTRACTI128 VBROADCASTSS/VBROADCASTSD/VBROADCASTF128
* [ARM64_DYNAREC] Removed commented codeptitSeb2025-06-231-1/+0
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* [DYNAREC] Refactored a bit BARRIER_FLOAT ([ARM64] olny for now, todo for ↵ptitSeb2025-06-2314-41/+115
| | | | RV64 and LA64)
* [ARM64_DYNAREC] Small fix in arch_buildptitSeb2025-06-221-1/+1
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* [DYNACACHE][RV64] Enabled dynacache for RV64 (#2762)Yang Liu2025-06-206-59/+118
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* [DYNACACHE][RV64] More work on internal reloc (#2759)Yang Liu2025-06-199-78/+95
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* [DYNACACHE][RV64] Added const table for later use in internal relocation (#2758)Yang Liu2025-06-1916-117/+368
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* [DYNACACHE] Another fix for non-ARM64 Dynarec buildptitSeb2025-06-191-0/+4
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* [DYNACACHE] Fixed LA64 buildptitSeb2025-06-191-6/+2
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* [DYNACACHE] This should fix non-ARM64 Dynarec build, for goodptitSeb2025-06-192-2/+2
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* [DYNACACHE] This should fix non-ARM64 Dynarec buildptitSeb2025-06-192-1/+10
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* [DYNACACHE] Introduced DynaCache for ARM64 (disabled by default)ptitSeb2025-06-1917-97/+251
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* [WOW64] Refactored host extention detection and added preliminary support ↵Yang Liu2025-06-161-1/+1
| | | | for WowBox64 (#2752)
* [DYNACACHE] Added the ability to mark a maplist has having new blocks ↵ptitSeb2025-06-162-14/+14
| | | | (instead of dirty block that are refreshed)
* [DYNACACHE] More work on dynache relocationptitSeb2025-06-1520-32/+270
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* [DYNAREC] Make sure a dynablock does not exit a mmap backed by a file ↵ptitSeb2025-06-145-1/+8
| | | | address range
* [DYNACACHE] Refactored cpu extension, will be used in dynacache signature checksptitSeb2025-06-1459-684/+676
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* [DYNACACHE] Some more preparation work for internal relocationsptitSeb2025-06-132-5/+5
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* [DYNACACHE] More preparation work for internal relocationsptitSeb2025-06-132-3/+4
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* [DYNACACHE] More work on preparing internal reloc, plus fix non-trace buildptitSeb2025-06-1312-47/+59
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* [DYNACACHE] Created a const table, for later use in internal relocation ↵ptitSeb2025-06-1320-174/+351
| | | | ([ARM64] only, todo on RV64 and LA64)
* [ARM64_DYNAREC] Fixed some typos related ymm unneeded tracing (helps #2724) ↵Yang Liu2025-06-121-2/+2
| | | | (#2735)
* [ARM64_DYNAREC] Added 64/65 67 89/8B 64bits opcodes (#2730)Yang Liu2025-06-123-1/+97
| | | | | * [ARM64_DYNAREC] Added 64/65 67 89/8B 64bits opcodes * review