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* [LA64_DYNAREC] Added more opcodes (#2333)Yang Liu2025-02-081-0/+11
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* [ARM64_DYNAREC] Minor simplifications with the usage of GETEX (#2332)Yang Liu2025-02-081-14/+2
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* [RV64_DYNAREC] Minor fixes and improvements on various opcodes (#2331)Yang Liu2025-02-082-29/+36
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* [LA64_DYNAREC] Added more opcodes (#2330)Yang Liu2025-02-085-0/+178
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* [LA64_DYNAREC] Added more opcodes (#2328)Yang Liu2025-02-083-0/+35
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* [RV64_DYNAREC] Added aligned optim case for REP MOVSB (#2327)Yang Liu2025-02-084-1/+39
| | | | | * [RV64_DYNAREC] Added aligned optim case for REP MOVSB * fixed a typo
* [ARM64_DYNAREC] Optimized unaligned path for REP MOVSBptitSeb2025-02-081-1/+15
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* [ARM64_DYNAREC] Added more aligned optim cases for REP MOVSB (#2326)Yang Liu2025-02-084-1/+18
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* [LA64_DYNAREC] Added more opcodes (#2324)Yang Liu2025-02-072-0/+13
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* [LA64_DYNAREC] Added more opcodes (#2323)Yang Liu2025-02-073-0/+30
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* [LA64_DYNAREC] Added more 66 0F 38 opcodes (#2322)Yang Liu2025-02-071-0/+19
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* [LA64_DYNAREC] Fixed F3 0F MOVSLDUP opcode (#2321)Yang Liu2025-02-071-1/+1
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* [ARM64_DYNAREC] Optimized REP MOVSBptitSeb2025-02-072-0/+16
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* [RV64_DYNAREC] Small optim to 64 A1/A3 opcodes (#2320)Yang Liu2025-02-071-6/+12
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* [DYNAREC] Optimized grab_segdata calls on MODREG (#2319)Yang Liu2025-02-0713-126/+129
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* [LA64_DYNAREC] Added 64 88 MOV opcode (#2318)Yang Liu2025-02-071-1/+34
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* [ARM64_DYNAREC] Small optims/fixes for a few F2 0F prefixed opcodesptitSeb2025-02-061-6/+16
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* [ARM64_DYNAREC] Added a comment in emitter on FCMP behaviourptitSeb2025-02-061-0/+3
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* [ARM64_DYNAREC] Fixed fstp long double when fastround==0ptitSeb2025-02-063-5/+48
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* [DYNAREC] Fixed a rare issue when flags would not be computed on 1st opcode ↵ptitSeb2025-02-041-1/+1
| | | | of a block if a jump go there (and added a profile for fixed MGSV:TPP)"
* [ARM64_DYNAREC] Reduce the number of false positive for DYNAREC_MISSING=1 by ↵ptitSeb2025-02-033-5/+8
| | | | showing only null-sized block missing opcode
* [ARM64_DYNAREC] Optmized RCR Eb, CL, and fixed RCL Eb, CL opcodeptitSeb2025-02-031-23/+40
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* [ARM64_DYNAREC] Optimized RCL Eb, CL opcodeptitSeb2025-02-031-4/+33
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* [ARM64_DYNAREC] Added more details on Need optim message for easier grepptitSeb2025-02-038-38/+38
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* [ARM64_DYNAREC] Small optims on a few 66 prefixed opcodesptitSeb2025-02-032-16/+27
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* [ARM64_DYNAREC] Small improvment on 64 prefixed opcodesptitSeb2025-02-025-120/+70
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* [RV64_DYNAREC] Fixed F2 0F E6 opcode for vector (#2310)Yang Liu2025-02-011-0/+2
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* [ARM64_DYNAREC] Small optim and fixes to a few MMX opcodesptitSeb2025-02-011-52/+30
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* [ARM64_DYNAREC] Various small fixes and optims in a few AVX opcodesptitSeb2025-01-314-34/+69
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* [ARM64_DYNAREC] Fixed mxcsr sync with fpsr on SSE_SLUSHTO0, and added a ↵ptitSeb2025-01-311-17/+18
| | | | profile that needs it
* [ARM64_DYNAREC] Small change on defered flag handling to make sure it's ↵ptitSeb2025-01-313-78/+67
| | | | marked to None when needed
* More improvmnet to map with fd trackingptitSeb2025-01-291-1/+1
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* [RV64_DYNAREC] Fixed lui/auipc immediate in the printer (#2299)xctan2025-01-281-2/+2
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* Improved file map tracking, and use file map info in dynarec for bigblock ↵ptitSeb2025-01-271-1/+1
| | | | setting
* [AR64_DYNAREC] Removed a few more use of TABLE64ptitSeb2025-01-262-5/+5
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* [ARM64_DYNAREC] Added AVX.F3.0F38 F5 opcodeptitSeb2025-01-261-0/+29
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* [ARM64_DYNAREC] Added experimental synch of fpsr and mxcsr for the flags, ↵ptitSeb2025-01-252-8/+74
| | | | when BOX64_SSE_FLUSHTO0 is used
* [RV64_DYNAREC] Added unaligned codegen for MOVSW (#2296)xctan2025-01-251-1/+7
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* [RV64_DYNAREC] Optimized GETIP (#2294)Yang Liu2025-01-247-54/+55
| | | Co-authored-by: xctan <xctan@cirno.icu>
* [RV64_DYNAREC] Removed some TABLE64 usage (#2291)Yang Liu2025-01-242-31/+22
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* [RV64_DYNAREC] Force priv opcode flags to be at least defered if safeflags=2 ↵Yang Liu2025-01-245-20/+64
| | | | ([LA64_DYNREC] too) (#2293)
* [RV64_DYNAREC] Restricted add/sub RSP optimization ([LA64_DYNAREC] too) (#2292)Yang Liu2025-01-242-4/+4
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* [RV64_DYNAREC] Added codegen for unaligned stores (#2289)xctan2025-01-2410-20/+354
| | | | | * [RV64_DYNAREC] Added another special SIGBUS case * [RV64_DYNAREC] Added codegen for unaligned stores
* [DYNAREC] Added preliminary per-file settings (#2288)Yang Liu2025-01-2318-156/+148
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* [LA64_DYNAREC] Added fastnan handling to more 0F opcodes (fixes CI) (#2285)Yang Liu2025-01-231-6/+48
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* [RV64_DYNAREC] Added fastnan handling to more 0F opcodes (fixes CI) (#2284)Yang Liu2025-01-232-6/+42
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* [ARM64_DYNAREC] Added a few AVX opcode and Improved/Fixed some existing SSE ↵ptitSeb2025-01-2210-135/+557
| | | | and AVX ones
* [ARM64_DYNAREC] Remove another use of Table64ptitSeb2025-01-221-1/+1
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* Added [BOX64] prefix for all the stdout logs (#2279)Yang Liu2025-01-218-21/+21
| | | | | | | * Added [BOX64] prefix for all the stdout logs * Remove some hardcoded prefix * review
* [ENV] Initial refactor of env variables infrastructure (#2274)Yang Liu2025-01-2167-783/+787
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * [ENV] Initial refactor of env variables infrastructure * Ported BOX64_DYNAREC_LOG * Ported more options * Ported BOX64_MALLOC_HACK * Ported BOX64_DYNAREC_TEST * Ported more options * Ported more options * Ported more options * Ported all options * Removed old rcfile parser * Fix * review * fix * fix * more fixes