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* [RV64_DYNAREC] Added more opcodes for vector (#1848)Yang Liu2024-09-201-0/+58
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* [LA64_DYNAREC] Fixed a typo in GETGB (#1846)Yang Liu2024-09-201-1/+1
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* [RV64_DYNAREC] Added more opcodes and fixed more issues for vector (#1842)Yang Liu2024-09-203-14/+148
| | | | | | | | | | | | | | | * [RV64_DYNAREC] Added 66 0F 6D PUNPCKHQDQ opcode * [RV64_DYNAREC] Added more opcode * [RV64_DYNAREC] Added more opcodes for vector * [RV64_DYNAREC] Added more opcodes * [RV64_DYNAREC] Added more opcodes * [RV64_DYNAREC] Added more opcode * More fixes
* [RV64_DYNAREC] Added 62 opcode (#1840)LiZhuoheng2024-09-201-1/+10
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* [RV64_DYNAREC] Fixed more issues catched on real machine (#1839)Yang Liu2024-09-192-18/+25
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* [RV64_DYNAREC] Added more 66 0F opcodes for vector (#1838)Yang Liu2024-09-192-14/+156
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* [RV64_DYNAREC] Added more opcodes for vector (#1837)Yang Liu2024-09-192-4/+78
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* [RV64_DYNAREC] Added more opcodes for vector (#1836)Yang Liu2024-09-194-0/+96
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* [RV64_DYNAREC] Fixed more unaligned issues for vector (#1835)Yang Liu2024-09-191-3/+6
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* [RV64_DYNAREC] Fixed some found issues in vector (#1834)Yang Liu2024-09-182-39/+43
| | | | | | | | | | | | | * [RV64_DYNAREC] Fixed 66 0F 63/6B PACKSSWB opcode * [RV64_DYNAREC] Fixed 66 0F 3A 0F PALIGNR opcode * [RV64_DYNAREC] GETGX_empty_vector should come after GETEX_vector * [RV64_DYNAREC] Fixed unaligned memory access * [RV64_DYNAREC] Fixed more unaligned issue * Fix CI
* [RV64_DYNAREC] Added more opcodes for vector (#1833)Yang Liu2024-09-183-43/+139
| | | | | * [RV64_DYNAREC] Added more opcodes for vector * review
* Save flags and defered flags when runing EmuCall ([DYNAREC] Same for DynaCall)ptitSeb2024-09-171-0/+2
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* [DYNAREC] Track if a dynablock is for 32bits code (for future use)ptitSeb2024-09-172-6/+9
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* [RV64_DYNAREC] Added more 66 0F opcodes for vector (#1832)Yang Liu2024-09-171-0/+164
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* [RV64_DYNAREC] Added more 66 0F opcodes for vector (#1831)Yang Liu2024-09-171-0/+90
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* [RV64_DYNAREC] Added more opcodes for vector (#1830)Yang Liu2024-09-163-3/+187
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* [RV64_DYNAREC] Added more 66 0F opcodes for vector (#1829)Yang Liu2024-09-161-0/+69
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* [DYNAREC] Forgot some files in previous commitptitSeb2024-09-162-2/+9
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* [DYNAREC] Make sure jump address is wrapped on 32bits address spaceptitSeb2024-09-169-16/+52
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* [BOX32][TRACE] Added a warning when executing 32bits code in 64bits address ↵ptitSeb2024-09-161-0/+5
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* [ARM64_DYNAREC] Fixed most CD xx opcodesptitSeb2024-09-151-0/+1
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* Added 66 F3 0F BD opcode ([ARM64_DYNAREC] Too)ptitSeb2024-09-141-0/+21
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* Fixed flags for AVX.0F38 F2 opcode ([ARM64_DYNAREC] too)ptitSeb2024-09-141-1/+16
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* [RV64_DYNAREC] Added 1 more opcode for vector and some refactor and fixes ↵Yang Liu2024-09-137-47/+74
| | | | too (#1824)
* [DYNAREC] fix page calculation error (#1822)JunChi10222024-09-121-3/+3
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* [RV64_DYNAREC] Refactored vector SEW tracking (#1820)Yang Liu2024-09-129-48/+46
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* [RV64_DYNAREC] Fixed a typo on vector_sew initialization (#1819)Yang Liu2024-09-122-2/+2
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* [RV64_DYNAREC] Added more 0F opcodes for vector (#1817)Yang Liu2024-09-112-1/+51
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* [RV64_DYNAREC] Added more 0F opcodes for vector and optimized some opcodes ↵Yang Liu2024-09-116-33/+179
| | | | | | | | | | | too (#1816) * [RV64_DYNAREC] Optimized 66 0F 67 PACKUSWB opcode * [RV64_DYNAREC] Optimized 66 0F 6C PUNPCKLQDQ opcode * [RV64_DYNAREC] Added some 0F opcodes for vector * review
* [RV64_DYNAREC] Added more 66 0F opcodes for vector (#1815)Yang Liu2024-09-102-3/+66
| | | | | * [RV64_DYNAREC] Added more 66 0F opcodes for vector * [RV64_DYNAREC] Fixed PACKUSWB for vlen >= 256
* [RV64_DYNAREC] Added 66 0F D4 PADDQ opcode for vector and fixes SEW cache ↵Yang Liu2024-09-102-3/+12
| | | | | | | transform (#1812) * [RV64_DYNAREC] Added 66 0F D4 PADDQ opcode for vector * [RV64_DYNAREC] Transform SEW cache after fpu cache
* [RV64_DYNAREC] Added more 66 0F opcodes for vector (#1811)Yang Liu2024-09-103-6/+44
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* [ARM64_DYNAREC] Added 64 0F 28/29 opcodesptitSeb2024-09-091-0/+47
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* [ARM64_DYNAREC] Avoid computing flags if they are just recomputed at jump pointptitSeb2024-09-081-2/+11
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* [ARM64_DYNAREC] Small optim for 0F C6 opcodeptitSeb2024-09-081-4/+16
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* [ARM64_DYNAREC] Improved AVX.66.0F38 8C opcodeptitSeb2024-09-061-12/+58
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* Fixed a regression introduced with box32 that broke Bladur's Gate 3 (and ↵ptitSeb2024-09-053-5/+5
| | | | probably a few other)
* [CI] Refactored CI (#1795)Yang Liu2024-09-057-9/+0
| | | | | | | | | | | | | | | | | * [CI] Enable Box32 tests on LA64 * upgrade QEMU * [COSIM] Removed thread-safe tests * Use regular cosim in CI * [CI] Simplified "Test Box64" * exclude certain tests when testing with cosim * review * box64.pod too
* [ARM64_DYNAREC] Added 67 66 0F 7E opcodeptitSeb2024-09-041-0/+25
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* [ARM64_DYNAREC] Added AVX.66.0F 51 opcodeptitSeb2024-09-041-0/+23
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* [DYNAREC]: fix BICS encoding (#1783)JunChi10222024-09-012-3/+11
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* [RV64_DYNAREC] Added xthead* extensions to the new printer (#1781)Yang Liu2024-08-311-0/+184
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* [RV64_DYNAREC] Refactored rv64_printer (#1779)Yang Liu2024-08-301-1730/+5634
| | | | | * [RV64_DYNAREC] Refactored printer * Fixed one more issue
* [ARM64_DYNAREC] Added 67 F3 0F 38 F6 opcode (for #1775)ptitSeb2024-08-301-0/+33
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* [BOX32][LA64_DYNAREC] Added preliminary box32 support (#1773)Yang Liu2024-08-297-78/+124
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* [RV64_DYNAREC] Fixed a falsy optimization, better EMIT macro (#1769)Yang Liu2024-08-285-14/+36
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* [RV64_DYNAREC] Optimized jump_to_next using XTheadBb instructions (#1768)Yang Liu2024-08-282-25/+53
| | | | | * [RV64_DYNAREC] Optimized jump_to_next using XTheadBb instructions * fixed some bad bad typos
* [BOX32][RV64_DYNAREC] Fixed more issues and enable CI for box32 (#1767)Yang Liu2024-08-285-13/+30
| | | | | | | | | | | * [BOX32][RV64_DYNAREC] Fixed more issues * fix * fix * enable Ci for box32 * add some comments
* [ARM64_DYNAREC] Not using simpleWrapper when dynarec_test is onptitSeb2024-08-281-4/+4
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* [BOX32][RV64_DYNAREC] Added preliminary box32 support to RV64 (#1766)Yang Liu2024-08-286-35/+38
| | | | | | | | | * [BOX32][RV64_DYNAREC] Added preliminary box32 support to RV64 * fix * fix fix * fix