| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [INTERPRETER] Added 0F 30 ocpode ([RM64_DYNAREC] too) (for #2090) | ptitSeb | 2024-11-30 | 1 | -1/+6 |
| * | Small fix for XSAVE/XRSTOR opcodes ([DYNAREC] too) | ptitSeb | 2024-11-21 | 1 | -2/+2 |
| * | [INTERPRETER] Fixed potential issue with 0F A3 opcode | ptitSeb | 2024-11-16 | 1 | -5/+5 |
| * | Added support for RDMSR, just in case | ptitSeb | 2024-11-15 | 1 | -0/+7 |
| * | Improve handling of memory protection, and excution bit | ptitSeb | 2024-11-04 | 1 | -0/+13 |
| * | Improved 0F 0D opcode ([ARM64_DYNAREC] too) (FF7RI now have sound) | ptitSeb | 2024-10-19 | 1 | -2/+8 |
| * | Fixed a regression introduced with box32 that broke Bladur's Gate 3 (and prob... | ptitSeb | 2024-09-05 | 1 | -6/+6 |
| * | [CI] Refactored CI (#1795) | Yang Liu | 2024-09-05 | 1 | -28/+0 |
| * | Improved CPUID a bit more, adding RDRAND (helps geekbench6 avx2 version) | ptitSeb | 2024-06-24 | 1 | -2/+18 |
| * | Small improvment to 0F BC/BD opcodes ([ARM64_DYNAREC] too) | ptitSeb | 2024-06-23 | 1 | -2/+2 |
| * | More work on RDTSC emulation | ptitSeb | 2024-06-13 | 1 | -1/+1 |
| * | [INTERPRETER] More avx, avx2 and vaes opcodes | ptitSeb | 2024-05-28 | 1 | -1/+1 |
| * | [INTERPRETER] Some fixes when opcode use with same reg as src and dest | ptitSeb | 2024-05-27 | 1 | -0/+4 |
| * | more avx infrastructure | ptitSeb | 2024-05-24 | 1 | -1/+1 |
| * | Added support for XSAVE/XRSTOR ([ARM64_DYNAREC] too) | ptitSeb | 2024-05-24 | 1 | -5/+22 |
| * | [INTERPRETER] Added more opcodes and fixed some opcodes too (#1511) | Yang Liu | 2024-05-21 | 1 | -11/+116 |
| * | [COSIM] Fixed issue with 0F C7 opcode | ptitSeb | 2024-05-15 | 1 | -5/+1 |
| * | [COSIM] Added thread-safe tests (#1477) | Yang Liu | 2024-04-30 | 1 | -0/+28 |
| * | Changed, again, RDTSC and Hardware counter, introducing auto calibration when... | ptitSeb | 2024-03-14 | 1 | -0/+4 |
| * | Added 0F 01 F9 opcode ([ARM64_DYNAREC] too | ptitSeb | 2024-02-24 | 1 | -2/+8 |
| * | Added 0F 01 E0..E7 opcodes ([ARM64_DYNAREC] too) | ptitSeb | 2024-02-10 | 1 | -0/+10 |
| * | Changed a bit how SGDT/SIDT are faked ([ARM64_DYNAREC] too) | ptitSeb | 2024-02-06 | 1 | -4/+10 |
| * | [INTERPRETER] Improved 0F AE opcodes | ptitSeb | 2024-02-03 | 1 | -10/+15 |
| * | Added 0F 0E opcode support ([ARM64_DYNAREC] too) | ptitSeb | 2024-02-01 | 1 | -0/+5 |
| * | Reworked 0F 01 opcode ([ARM64_DYNAREC] too) | ptitSeb | 2024-01-26 | 1 | -37/+24 |
| * | [32BITS] Added some more opcode to the 32bits part of interpreter, to run mor... | ptitSeb | 2024-01-26 | 1 | -6/+66 |
| * | [INTERPRETER] Improved 0F 01 opcode ([ARM64_DYNAREC] too) | ptitSeb | 2024-01-06 | 1 | -0/+21 |
| * | [INTERPRETER] Refactored 0F A4/A5 opcodes for better readability | ptitSeb | 2023-12-05 | 1 | -5/+15 |
| * | Added full support for the SHA cpu extension | ptitSeb | 2023-11-21 | 1 | -0/+46 |
| * | More accurate 0F BA opcodes on 64bits without rex.w | ptitSeb | 2023-11-09 | 1 | -0/+6 |
| * | [INTERP] Fix fpu_round (#1030) | Yang Liu | 2023-10-25 | 1 | -1/+6 |
| * | [ARM64_DYNAREC] Added 0F F1/F3/F7 opcodes | wannacu | 2023-08-21 | 1 | -1/+10 |
| * | Added 0F A8/A9 opcodes | ptitSeb | 2023-08-13 | 1 | -0/+14 |
| * | Added 0F A0/A1 opcodes | ptitSeb | 2023-08-13 | 1 | -1/+13 |
| * | [ARM64_DYNAREC] Added 0F FB opcode | wannacu | 2023-08-10 | 1 | -1/+6 |
| * | Added 0F F4 opcode ([ARM64_DYNAREC] too) (for #888) | ptitSeb | 2023-07-17 | 1 | -1/+6 |
| * | Added 0F D4 opcode ([ARM64_DYNAREC] too) | ptitSeb | 2023-07-17 | 1 | -1/+6 |
| * | [32BITS] Various small fixes in 32bits interpreter | ptitSeb | 2023-06-18 | 1 | -4/+8 |
| * | Added 0F EA/EE opcodes ([ARM64_DYNAREC] too) (for #829) | ptitSeb | 2023-06-10 | 1 | -2/+14 |
| * | [DYNAREC_TEST] Fixed handling or 0F AE opcodes | ptitSeb | 2023-05-04 | 1 | -5/+3 |
| * | [DYNAREC_TEST] Improved 67 DB and 0F AE opcodes handling | ptitSeb | 2023-05-04 | 1 | -1/+5 |
| * | [RV64_DYNAREC] Added more opcode for SV and some fixes (#683) | Yang Liu | 2023-04-10 | 1 | -7/+7 |
| * | Added back some isnan testing to integer conversion (converting a nan, infini... | ptitSeb | 2023-04-06 | 1 | -16/+19 |
| * | Updated 0F 2C/2D and 66 0F 2C/2D opcode on par with other float2int opcodes | ptitSeb | 2023-04-06 | 1 | -23/+27 |
| * | [DYNAREC] More improvement to TEST_DYNAREC | ptitSeb | 2023-03-31 | 1 | -1/+1 |
| * | [DYNAREC] Added BOX64_DYNAREC_TEST to run interpeter and dynarec at the same ... | ptitSeb | 2023-03-27 | 1 | -5/+64 |
| * | Various small fixes on Interpretor | ptitSeb | 2023-02-16 | 1 | -17/+20 |
| * | [DYNAREC] Fixed a potential crash when running without Dynarec | ptitSeb | 2023-01-28 | 1 | -1/+2 |
| * | Try to improve precision of SSE Rounding to int conversion ([DYNAREC] too, in... | ptitSeb | 2023-01-28 | 1 | -20/+26 |
| * | Added experimental (undocumented) BOX64_SSE_FLUSHTO0 env. var. (not sure it's... | ptitSeb | 2022-12-04 | 1 | -3/+5 |