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* [INTERP] Fixed overflow checking for convertion opcodes (#1976)Yang Liu2024-10-291-2/+2
* [ARM64_DYNAREC] Added 66 0F BF opcode (and cosmetic fix on interpreter)ptitSeb2024-09-241-2/+2
* [RV64_DYNAREC] Added more opcodes (#1740)Yang Liu2024-08-161-2/+2
* Fixes (#1659)rajdakin2024-07-091-15/+15
* [COSIM] Some improvment to avoid segfault in edge casesptitSeb2024-06-171-1/+1
* [INTERPRETER] Small fixes for some rare case of AES with serc==destptitSeb2024-06-021-19/+19
* [INTERPRETER] Added BMI1, BMI2 and ADX extensionsptitSeb2024-05-311-1/+27
* [INTERPRETER] Added more avx/avx2 opcodes, and fixed vpxorptitSeb2024-05-291-28/+12
* [INTERPRETER] Even more avx/avx2 opcodes, all the mov and moreptitSeb2024-05-281-1/+0
* [INTERPRETER] Some fixes when opcode use with same reg as src and destptitSeb2024-05-271-0/+8
* [INTERPRETER] Fixed pcmp[ei]strm opcodesptitSeb2024-04-281-8/+8
* Added 66 0F BF opcodeptitSeb2024-03-211-0/+9
* [INTERPRETER] Fixed a typo in 66 0F 2C opcodeptitSeb2023-11-101-4/+4
* Cosmetic changeptitSeb2023-11-071-1/+1
* Fixed a comment for 66 0F 3A 62 opcodeptitSeb2023-10-301-1/+1
* Added full SSE 4.2 supportptitSeb2023-10-301-0/+60
* [INTERP] Fix fpu_round (#1030)Yang Liu2023-10-251-6/+31
* Added 66 0F 3A 0D opcode ([ARM64_DYNAREC] Too)ptitSeb2023-09-261-1/+10
* [RV64_DYNAREC] Added more support for XTheadBb extension (#989)Yang Liu2023-09-241-24/+24
* [RV64_DYNAREC] Added movbe opcodewannacu2023-08-071-1/+12
* [INTERPRETER] Added 66 0F 38 37 PCMPGTQ opcode (#827)Yang Liu2023-06-081-1/+7
* Added 66 0F 38 07 opcode ([ARM64_DYNAREC] too)ptitSeb2023-04-081-1/+17
* Added 66 0F 38 2A opcode ([ARM64_DYNAREC] too)ptitSeb2023-04-081-1/+7
* Added 66 0F 38 41 opcodeptitSeb2023-04-081-0/+17
* Added 66 0F 3A 41 opcodeptitSeb2023-04-081-0/+14
* Fixed 66 0F 38 40 opcodeptitSeb2023-04-081-2/+1
* Added 66 0F 38 28 opcode ({ARM64_DYNAREC] too)ptitSeb2023-04-081-0/+7
* Added 66 0F 3A 42 opcodeptitSeb2023-04-081-0/+21
* Added 66 0F 38 06 opcodeptitSeb2023-04-081-0/+13
* Fixed 66 0F 3A 08/09/0A/0B opcodeptitSeb2023-04-081-5/+5
* Added 66 0F 38 15 opcodeptitSeb2023-04-081-0/+9
* Added 66 0F 38 0C opcode ([ARM64_DYNAREC] too)ptitSeb2023-04-081-0/+11
* Fixed 66 0F 38 2B opcodeptitSeb2023-04-081-3/+3
* Added back some isnan testing to integer conversion (converting a nan, infini...ptitSeb2023-04-061-17/+20
* Updated 0F 2C/2D and 66 0F 2C/2D opcode on par with other float2int opcodesptitSeb2023-04-061-11/+25
* [INTERP] Added 66 0F 2B MOVNTPD opcode & fixed some edge cases (#668)Yang Liu2023-04-051-22/+31
* Fixed 66 0F 5B opcodesptitSeb2023-04-011-1/+1
* Added 66 0F 3A 08/09 opcodes ([ARM64_DYNAREC] too)ptitSeb2023-03-311-0/+56
* [DYNAREC] Some more improvment to TEST_INTERPRETERptitSeb2023-03-281-4/+4
* [DYNAREC] Added BOX64_DYNAREC_TEST to run interpeter and dynarec at the same ...ptitSeb2023-03-271-1/+16
* Fixed flag handling of PTEST opcodeptitSeb2023-03-261-1/+5
* Added/Fixed 66 0F 3A 14/15/16 opcodes ([ARM64_DYNAREC] too)ptitSeb2023-03-231-5/+20
* Added 66 0F 38 29 PCMPEQQ opcde ([ARM64_DYNAREC] too) (for #558)ptitSeb2023-03-141-0/+8
* Added support for SSE4.1, and added a couple of opcode ([ARM64_DYNAREC] too)ptitSeb2023-03-121-0/+21
* Various small fixes on InterpretorptitSeb2023-02-161-53/+53
* Try to improve precision of SSE Rounding to int conversion ([DYNAREC] too, in...ptitSeb2023-01-281-28/+26
* Added experimental (undocumented) BOX64_SSE_FLUSHTO0 env. var. (not sure it's...ptitSeb2022-12-041-4/+4
* Added 66 0F 38 10 opcode ({DYNAREC] too)ptitSeb2022-10-291-0/+10
* Added 66 0F 7D opcodeptitSeb2022-10-281-1/+25
* Added PCLMULQDQ ([DYNAREC] Too, using PMULL if present) extension (improve a ...ptitSeb2022-09-301-0/+19