| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [INTERP] Refactored how 64/65/66/67 and F2/F3 prefixes are handled, removing ↵ | ptitSeb | 2025-08-22 | 1 | -121/+0 |
| | | | | | some (mostly) duplicated code | ||||
| * | Introduced box64cpu.h for exported interpreter and dynarec functions (#2490) | Yang Liu | 2025-04-01 | 1 | -1/+0 |
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| * | Added 67 66 83 opcodes ([ARM64_DYNAREC] too) | ptitSeb | 2024-05-26 | 1 | -0/+23 |
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| * | [INTERPRETER] Added 67 66 8D opcode ([ARM64_DYNAREC] too) | ptitSeb | 2024-01-06 | 1 | -0/+10 |
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| * | Added 67 66 89 opcode | ptitSeb | 2023-06-18 | 1 | -4/+15 |
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| * | [DYNAREC] Added BOX64_DYNAREC_TEST to run interpeter and dynarec at the same ↵ | ptitSeb | 2023-03-27 | 1 | -1/+11 |
| | | | | | time and compare states | ||||
| * | Chenged Interpretor so RIP is updated on opcode success (better precision ↵ | ptitSeb | 2022-08-06 | 1 | -4/+4 |
| | | | | | for Signal) | ||||
| * | [DYNAREC] Refactored dynarec to ease the future adding of new target ↵ | ptitSeb | 2022-02-27 | 1 | -1/+1 |
| | | | | | architecture | ||||
| * | First pass | rajdakin | 2021-04-14 | 1 | -12/+14 |
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| * | Added 67 66 0F 6F/7A opcodes | ptitSeb | 2021-04-08 | 1 | -0/+66 |