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* [INTERP] Fixed some more instruction name commentsptitSeb2025-04-291-2/+2
* [INTERP] Fixes and improvments to SSE/AVX packed shift opcodesptitSeb2025-04-283-84/+40
* [INTERP] More work on UD flagsptitSeb2025-04-275-13/+65
* [INTERP] Fixed some potential issue with LOCK ADC/SBB on Dynarec buildptitSeb2025-04-271-15/+23
* [INTERP] Added 66 F3 0F BC opcodeptitSeb2025-04-271-0/+33
* [WRAPPER] Reworked libssh2 wrapping, to make it more completeptitSeb2025-04-271-0/+38
* [INTERP] Cosmetic change to VPSHUFD opocdeptitSeb2025-04-261-1/+1
* [WRAPPER] Added some missing function to wrapped libgio-2 (for #2575)ptitSeb2025-04-261-0/+4
* [INTERP] Another fix for a opcode name in commentptitSeb2025-04-251-1/+1
* [INTERP] Fixed a small issue where VPCMP[E/I]STRM would not wipe upper 128bit...ptitSeb2025-04-251-2/+2
* [INTERP] Yet another opcode name comment fixptitSeb2025-04-241-1/+1
* [INTERP] Cosmetic change to 0F 1C..1E opcodesptitSeb2025-04-241-3/+3
* [INTERP] Added nan handling on AVX.F3.0F 59 opcodeptitSeb2025-04-241-0/+2
* [INTERP] Fixed another opcode name commentptitSeb2025-04-241-1/+1
* [INTERP] Fixed a commentptitSeb2025-04-241-1/+1
* [INTERP] Small change to various (V)MOVNT* opcodes, forbidding reg -> reg formptitSeb2025-04-246-56/+74
* [INTERP] Fex fixes and small cosmetic changes to some partial (V)MOV opcodesptitSeb2025-04-235-47/+80
* [INTERP] RaZ upper 128bits on vmov* Ex, Gx if Ex is a registry (unused?)ptitSeb2025-04-232-0/+6
* [INTERP] Improved (V)[MIN/MAX][S/P][S/D] opcodesptitSeb2025-04-228-34/+25
* [INTERP] More fixes to INSERTQ/EXTRQ opcodesptitSeb2025-04-212-13/+17
* [INTERP] Fixed EXTRQ opcodeptitSeb2025-04-211-3/+3
* [INTERP] Better NAN handling for (V)DIV[P/S][S/D] opcodesptitSeb2025-04-213-0/+5
* [INTERP] VDPPD has no 256bits versionptitSeb2025-04-211-12/+2
* [INTERP] Added F2 0F BA opcode (for 2547)ptitSeb2025-04-191-1/+1
* [WOW64] Finished skeleton code for PE build (#2542)Yang Liu2025-04-171-1/+0
* [INTERP] Added x87 Precision Control set to 24bits handlingptitSeb2025-04-165-0/+43
* [TRACE] Better x87 infos on reg dumpsptitSeb2025-04-161-3/+3
* Eliminated many compilation warnings (#2535)Yang Liu2025-04-154-187/+14
* [WOW64] Added non-functional PE build (#2532)Yang Liu2025-04-146-1221/+1126
* [WOW64] More tweaks for PE build (#2528)Yang Liu2025-04-1413-31/+9
* [INTERP] Fixed pure 32bits iretd not behaving correctlyptitSeb2025-04-131-16/+13
* [WOW64] Splitted freq and cleanup functions from x64emu (#2521)Yang Liu2025-04-113-197/+6
* [WOW64] More tweaks towards PE build (#2519)Yang Liu2025-04-102-39/+24
* Moved emit functions to seperate files from signals.h (#2516)Yang Liu2025-04-0915-17/+18
* [INTERP] Small changes in a few SSE/AVX convertions opcodesptitSeb2025-04-044-13/+13
* Decoupled alternate functions from bridge (#2500)Yang Liu2025-04-034-4/+4
* [INTERP] Fixed a nan propagation issue on RISC-V (#2498)Yang Liu2025-04-031-4/+16
* Moved more functions to os.h (#2497)Yang Liu2025-04-037-20/+18
* [INTERP] Better handling of default NAN for a few opcodes, more to comeptitSeb2025-04-0310-229/+126
* Moved some emit functions to os.h (#2494)Yang Liu2025-04-0214-68/+77
* Moved more OS-dependent functions to os.h (#2491)Yang Liu2025-04-013-7/+3
* Introduced box64cpu.h for exported interpreter and dynarec functions (#2490)Yang Liu2025-04-0150-131/+21
* Added os.h for future usage (#2488)Yang Liu2025-04-016-7/+7
* [INTERP] Added support for F2 0F A5 opcode, ignoring F2 (for #2459)ptitSeb2025-03-311-0/+8
* [WRAPPER] Added 2 new funciton towrapped libgdkpixbuf (for #2460)ptitSeb2025-03-311-0/+4
* [INTERP] Fixed a warningptitSeb2025-03-301-2/+2
* [INTERP] Fixed Interpreter to have new test30 running on RISC-V (#2470)Yang Liu2025-03-272-90/+123
* [INTERP] More NA Sign fixes for a few AVX.0F opcodesptitSeb2025-03-261-8/+8
* [INTERP] Fixed Interpreter to have new test30 runningptitSeb2025-03-263-4/+100
* [COSIM] Changed how F0 LOCK opcodes are skipped in COSIMptitSeb2025-03-261-0/+5