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* [LONGAARCH] Renamed arch to LA64, as LA464 is code name for 3a5000, so that w...ptitSeb2024-02-281-1/+1
* LARCH64 dynarec (#1295)Haichen Wu2024-02-281-0/+3
* [RV64_INTERP] Added TSC freq support (#1293)Yang Liu2024-02-281-15/+65
* [RV64_DYNAREC] Fixed RDTSC handling (#1291)Yang Liu2024-02-271-1/+5
* [ANDROID] Small change on my___libc_init signatureptitSeb2024-02-271-1/+1
* Added 1 more syscallptitSeb2024-02-271-0/+1
* [RV64_INTERP] Comply CMPXCHG16B with dynarec (#1288)Yang Liu2024-02-271-2/+18
* Added ability to staticaly build box64 (for #1045 and #310, maybe a few other...ptitSeb2024-02-261-0/+22
* Added CA opcodeptitSeb2024-02-251-1/+14
* [32BITS] Added 0E opcode ([ARM64_DYNAREC] too)ptitSeb2024-02-241-0/+7
* Added 0F 01 F9 opcode ([ARM64_DYNAREC] tooptitSeb2024-02-241-2/+8
* Better handling of Hardware counter for rdtsc emulation (ARM64 only for now),...ptitSeb2024-02-231-8/+28
* Added 67 FF /2 opcode ([ARM64_DYNAREC] too)ptitSeb2024-02-221-1/+14
* [INTERPRETER] Added CB opcodeptitSeb2024-02-221-0/+12
* [ARM64_DYNAREC] Added RCR 8bits with constant optimisation, and fixed RCL 8bi...ptitSeb2024-02-211-2/+13
* [INTERPRETER] SHRD/SHLD with cnt==0 should not change flagsptitSeb2024-02-211-6/+18
* [ARM64] Used Hardware counter for RDTSC emulation ([ARM64_DYNAREC] too)ptitSeb2024-02-211-2/+6
* Small adjustment to flags computation on the AAA/AAS/AAD/AAM/DAA/DAS opcodesptitSeb2024-02-211-22/+20
* Small adjustment to one flags computationptitSeb2024-02-211-1/+1
* [INTERPRETER] Fix shl/sar/shr for large shft value on 8 and 16bits operationsptitSeb2024-02-203-206/+96
* [INTERPRETER] Added a few unaligned path for some F0 math opcodesptitSeb2024-02-171-3/+23
* Better handling of 26/2E/36/3E prefix on F0 prefixed opcode ([ARM64_DYNAREC] ...ptitSeb2024-02-171-1/+2
* Added 67 C6 opcode ([ARM64_DYNAREC] too)ptitSeb2024-02-171-0/+5
* [ELFLOADER] Huge refactor of elfloader and symbol resolution. Some more clean...ptitSeb2024-02-151-1/+1
* [CI] Add Android Tests (#1263)KreitinnSoftware2024-02-141-1/+1
* [INTERPRETER] Improved FXAM handlingptitSeb2024-02-111-1/+1
* Added 0F 01 E0..E7 opcodes ([ARM64_DYNAREC] too)ptitSeb2024-02-101-0/+10
* Increased default size for number of elf in the tls dts zoneptitSeb2024-02-091-3/+5
* Added 1 syscallptitSeb2024-02-091-0/+4
* [DYNAREC_TEST] Have a proper TestEw that only copy/tests 2 bytes instead of 4ptitSeb2024-02-072-1/+14
* Reworked, again, exit processptitSeb2024-02-061-22/+22
* Changed a bit how SGDT/SIDT are faked ([ARM64_DYNAREC] too)ptitSeb2024-02-061-4/+10
* [INTERPRETER] CE opcode is only for 32bitsptitSeb2024-02-041-0/+4
* [INTERPRETER] Small D8..DF opcodes refactorptitSeb2024-02-048-288/+202
* [INTERPRETER] Improved 0F AE opcodesptitSeb2024-02-031-10/+15
* [X64EMU] Fix for linux clang (#1243)Lily2024-02-021-2/+2
* Fixed a warning on non-dynarec buildptitSeb2024-02-021-2/+0
* Added 0F 0E opcode support ([ARM64_DYNAREC] too)ptitSeb2024-02-011-0/+5
* [32BITS] Added 67 64 89 opcode ([ARM64_DYNAREC] too)ptitSeb2024-02-011-0/+7
* [32BITS] Added 67 64 A1 opcode ([ARM64_DYNAREC] too)ptitSeb2024-02-011-0/+11
* [INTERPRETER] Added CE opcodeptitSeb2024-01-311-1/+9
* Added mknod syscall (#1236)Yang Liu2024-01-311-9/+24
* [LOONGARCH] Fixed potential compilation issueptitSeb2024-01-311-0/+26
* [32BITS] Small improvment to E8/E9 opcode to trucate address to 32bitsptitSeb2024-01-291-2/+8
* [INTERPRETOR] More finetunning to shrd16/shld16ptitSeb2024-01-291-2/+5
* [INTERPRETER] Small improvements to shr/shl to limit fals-positive on DYNAREC...ptitSeb2024-01-291-7/+7
* [DYNAREC_TEST] Fixed some potential fals-positive on some CMP opcodesptitSeb2024-01-291-4/+4
* Added BOX64_IGNOREINT3 env. var. to ignore INT3 in the code ([RCFILE] too)ptitSeb2024-01-271-3/+5
* Rollback vfork changes, it broke SlayTheSpire, and probably other too (for #1...ptitSeb2024-01-271-3/+6
* [TEST_DYNAREC] Improved accuracy of some tests, and avoid a some false-positiveptitSeb2024-01-275-23/+26