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* [RV64_DYNAREC] Added more avx scalar 66 0F38 opcodes (#2950)Yang Liu2025-08-193-65/+83
| | | | | * [RV64_DYNAREC] Added more avx scalar 66 0F38 opcodes * more
* [RV64_DYNAREC] Added a few more scalar AVX 66 0F38 opcodes (#2949)Yang Liu2025-08-187-42/+451
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* [RV64_DYNAREC] Added scalar AVX VMOVDQA opcodes (#2948)Yang Liu2025-08-181-0/+42
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* [DYNAREC] Bump ARCH_VERSION (#2947)Yang Liu2025-08-181-3/+3
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* [LA64_DYNAREC] Enable AVX/AVX2 by default (#2946)Yang Liu2025-08-181-2/+2
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* [RV64_DYNAREC] Added more scalar AVX opcodes (#2945)Yang Liu2025-08-182-2/+127
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* [LA64_DYNAREC] Added more scalar AVX opcodes (#2943)Yang Liu2025-08-154-3/+131
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* [RV64_DYNAREC] Added more scalar AVX VMOV opcodes (#2942)Yang Liu2025-08-154-1/+169
| | | | | * [RV64_DYNAREC] Added more scalar AVX VMOV opcodes * more
* [RV64_DYNAREC] Added scalar AVX VMOVSS opcodes (#2941)Yang Liu2025-08-152-2/+62
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* [LA64_DYNAREC] Add la64 BMI/BMI2 ops. (#2933)phorcys2025-08-153-2/+233
| | | | | VEX.0F.38 BLSR, BLSMSK, BLSI, BZHI, BEXTR VEX.F2.0F.38 PDEP, MULX VEX.F3.0F.38 PEXT
* [RV64_DYNAREC] Fixed OF2 handling (#2937)Yang Liu2025-08-153-5/+4
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* [DYNAREC] Fixed reading emu->df (#2936)Yang Liu2025-08-154-15/+15
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* [LA64_DYNAREC] Fix VMOVNTDQA. (#2934)phorcys2025-08-152-16/+16
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* [LA64_DYNAREC] Add la64 avx insts using helpers. (#2935)phorcys2025-08-152-22/+168
| | | | VEX.66.0F.38 VAESIMC, VAESENC, VAESENCLAST, VAESDEC, VAESDECLAST VEX.66.0F.3a VPCLMULQDQ, VAESKEYGENASSIST
* [RV64_DYNAREC] Removed a dispensable line from dump (#2932)Yang Liu2025-08-133-10/+0
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* [LA64_DYNAREC] Fixed a typo in CMPXCHG8B opcode (#2931)Yang Liu2025-08-131-1/+1
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* [DYNAREC] Rearranged arch-specific AVX infra code (#2930)Yang Liu2025-08-1314-324/+131
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* [LA64_DYNAREC] Fix B3 BTR eflags when cpuext.lbt == 1. Fix 16bits AND when ↵phorcys2025-08-122-2/+6
| | | | cpuext.lbt == 1. (#2929)
* [RV64_DYNAREC] Added F0 08 LOCK OR opcode (#2928)Yang Liu2025-08-121-0/+25
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* [RV64_DYNAREC] Fixed F0 10 LOCK ADC opcode (#2927)Yang Liu2025-08-111-4/+7
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* [RV64_DYNAREC][LA64_DYNAREC] Fixed missing zeroup in geted_32() (#2921)Yang Liu2025-08-082-0/+2
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* [LA64_DYNAREC] Fixed AVX VPMOVMSKB opcode (#2920)Yang Liu2025-08-071-2/+2
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* [LA64_DYNAREC] Fixed AVX VPERM2F128/VPERM2I128 opcodes (#2919)Yang Liu2025-08-071-1/+1
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* [LA64_DYNAREC] Fixed AVX VMASKMOVDQU opcode (#2918)Yang Liu2025-08-071-1/+1
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* [LA64_DYNAREC] Fixed AVX VPBLENDW opcodes (#2917)Yang Liu2025-08-071-18/+6
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* [LA64_DYNAREC] Fixed AVX VMOVMSKPS/VMOVMSKPD opcodes (#2916)Yang Liu2025-08-072-4/+4
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* [LA64_DYNAREC] Fixed AVX VMOVSS opcode (#2915)Yang Liu2025-08-071-1/+1
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* [LA64_DYNAREC] Fixed AVX VCMPSS/VCMPSD opcodes (#2914)Yang Liu2025-08-072-2/+4
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* [LA64_DYNAREC] Fixed some AVX scalar MIN/MAX opcodes (#2913)Yang Liu2025-08-072-5/+5
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* [LA64_DYNAREC] Refined F3 0F 5D/5F MINSS/MAXSS opcodes (#2912)Yang Liu2025-08-071-18/+16
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* [BOX32] Enlarge xcb connects size for Linux Steam (#2910)Yang Liu2025-08-071-1/+1
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* [ARM64_DYNAREC] Fixed AVX VMOVMSKPD opcode (#2909)Yang Liu2025-08-061-2/+2
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* [ARM64_DYNAREC] Fixed AVX VMOVSS opcode (#2908)Yang Liu2025-08-061-1/+1
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* [ARM64_DYNAREC][INTERP] Fixed AVX VPERM2F128/VPERM2I128 opcodes (#2907)Yang Liu2025-08-062-42/+5
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* [LA64_DYNAREC] Fixed 66 0F 3A 16 PEXTRD opcode (#2906)Yang Liu2025-08-061-1/+1
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* [LA64_DYNAREC] Fixed 66 F3 0F B8 POPCNT opcode (#2905)Yang Liu2025-08-061-4/+5
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* [RV64_DYNAREC] Added 1 more opcode (#2903)Yang Liu2025-08-062-1/+6
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* [LA64_DYNAREC] Added more opcodes (#2902)Yang Liu2025-08-066-1/+248
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* Add O(1) early-out to eusing cached bounds (#2901)Chi-Kuan Chiu2025-08-051-2/+6
| | | | | | | | | | | | | | Add a fast-path in rb_get() and rb_get_64() that checks the tree’s cached leftmost->start and rightmost->end bounds before calling find_addr(). If the query address lies outside the address bounds, we return 0 immediately, avoiding an unnecessary tree walk. This mirrors the idea used in jserv/rbtree’s rb_cached_contains(), using cached min/max to short-circuit lookups. Behavior is unchanged (both functions still return 0 when not found); only negative lookups become cheaper. Co-authored-by: Jim Huang <jserv@ccns.ncku.edu.tw>
* [WRAPPER] Wrapped g_thread_pool some functions (#2900)Leslie Zhai2025-08-054-5/+12
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* [WRAPPER] Wrapped g_async_queue_new_full, g_async_queue_push_sorted, (#2899)Leslie Zhai2025-08-057-5/+34
| | | g_thread_pool_free, g_thread_pool_new and g_thread_pool_push
* [WRAPPER] Wrapped g_object_add_toggle_ref, g_object_remove_toggle_ref (#2897)Leslie Zhai2025-08-054-3/+47
| | | and g_object_weak_unref
* [WRAPPER] Wrapped g_type_module_use, g_type_module_register_type and ↵Leslie Zhai2025-08-059-4/+114
| | | | | | | g_type_module_add_interface (#2895) * [WRAPPER] Wrapped g_type_module_use, g_type_module_register_type and g_type_module_add_interface * [WRAPPER] Removed duplicated my_GInterfaceInfo_t
* [LA64_DYNAREC] Fixed F3 0F 53 RCPSS opcode (#2892)Yang Liu2025-08-041-7/+3
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* [LA64_DYNAREC] Fixed 66 0F 3A 0F PALIGNR for case where dst==src (#2894)Yang Liu2025-08-041-1/+1
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* [LA64_DYNAREC] Fixed 66 0F 38 06 PHSUBD opcode (#2893)Yang Liu2025-08-041-1/+1
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* [LA64_DYNAREC] Fixed 66 0F 3A 21 INSERTPS opcode (#2891)Yang Liu2025-08-041-6/+4
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* [LA64_DYNAREC] Added and optimized more fastround=0 cases (#2890)Yang Liu2025-08-042-15/+32
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* [LA64_DYNAREC] Fix some la64 ops. (#2889)phorcys2025-08-044-14/+32
| | | | | Fix 0F.BA./7 BTS CF when cpuext.lbt == 1 Fix 66.0F.CF BSWAP 16bits ops. Fix VEXTRACTF128, VINSERTF128
* [LA64_DYNAREC] Fixed 66 0F 38 14 BLENDVPS opcode (#2888)Yang Liu2025-08-041-1/+1
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