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| author | Christian Krinitsin <mail@krinitsin.com> | 2025-06-03 12:04:13 +0000 |
|---|---|---|
| committer | Christian Krinitsin <mail@krinitsin.com> | 2025-06-03 12:04:13 +0000 |
| commit | 256709d2eb3fd80d768a99964be5caa61effa2a0 (patch) | |
| tree | 05b2352fba70923126836a64b6a0de43902e976a /results/classifier/105/instruction/2861 | |
| parent | 2ab14fa96a6c5484b5e4ba8337551bb8dcc79cc5 (diff) | |
| download | emulator-bug-study-256709d2eb3fd80d768a99964be5caa61effa2a0.tar.gz emulator-bug-study-256709d2eb3fd80d768a99964be5caa61effa2a0.zip | |
add new classifier result
Diffstat (limited to 'results/classifier/105/instruction/2861')
| -rw-r--r-- | results/classifier/105/instruction/2861 | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/results/classifier/105/instruction/2861 b/results/classifier/105/instruction/2861 new file mode 100644 index 00000000..7c97d7ae --- /dev/null +++ b/results/classifier/105/instruction/2861 @@ -0,0 +1,20 @@ +instruction: 0.941 +device: 0.877 +graphic: 0.860 +network: 0.814 +vnc: 0.739 +socket: 0.687 +other: 0.667 +mistranslation: 0.667 +semantic: 0.467 +boot: 0.421 +KVM: 0.335 +assembly: 0.180 + +hw/pci-host/designware.c incorrect write to DESIGNWARE_PCIE_ATU_UPPER_TARGET register +Description of problem: +I think this is a obvious bug + +https://gitlab.com/qemu-project/qemu/-/blob/master/hw/pci-host/designware.c?ref_type=heads#L374 + +Write to register DESIGNWARE_PCIE_ATU_UPPER_TARGET, val should be shifted left to update upper 32 bit part. |