diff options
| author | Christian Krinitsin <mail@krinitsin.com> | 2025-07-03 16:27:09 +0000 |
|---|---|---|
| committer | Christian Krinitsin <mail@krinitsin.com> | 2025-07-03 16:27:09 +0000 |
| commit | 4d9e26c0333abd39bdbd039dcdb30ed429c475ba (patch) | |
| tree | 4010d5fb3e8bc48c110a2c1ff2a16b8648cb86bb /results/classifier/accel-gemma3:12b/kvm/2861 | |
| parent | 5541099586dbd6018574cb44e1934907c121526f (diff) | |
| download | emulator-bug-study-4d9e26c0333abd39bdbd039dcdb30ed429c475ba.tar.gz emulator-bug-study-4d9e26c0333abd39bdbd039dcdb30ed429c475ba.zip | |
add gemma accelerator classification results
Diffstat (limited to 'results/classifier/accel-gemma3:12b/kvm/2861')
| -rw-r--r-- | results/classifier/accel-gemma3:12b/kvm/2861 | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/results/classifier/accel-gemma3:12b/kvm/2861 b/results/classifier/accel-gemma3:12b/kvm/2861 new file mode 100644 index 00000000..db29d569 --- /dev/null +++ b/results/classifier/accel-gemma3:12b/kvm/2861 @@ -0,0 +1,8 @@ + +hw/pci-host/designware.c incorrect write to DESIGNWARE_PCIE_ATU_UPPER_TARGET register +Description of problem: +I think this is a obvious bug + +https://gitlab.com/qemu-project/qemu/-/blob/master/hw/pci-host/designware.c?ref_type=heads#L374 + +Write to register DESIGNWARE_PCIE_ATU_UPPER_TARGET, val should be shifted left to update upper 32 bit part. |