summary refs log tree commit diff stats
path: root/results/classifier/zero-shot-user-mode/instruction/1092
diff options
context:
space:
mode:
authorChristian Krinitsin <mail@krinitsin.com>2025-07-08 13:28:15 +0200
committerChristian Krinitsin <mail@krinitsin.com>2025-07-08 13:28:28 +0200
commit5aa276efcbd67f4300ca1a7f809c6e00aadb03da (patch)
tree9b8f0e074014cda8d42f5a97a95bc25082d8b764 /results/classifier/zero-shot-user-mode/instruction/1092
parent1a3c4faf4e0a25ed0b86e8739d5319a634cb9112 (diff)
downloademulator-bug-study-5aa276efcbd67f4300ca1a7f809c6e00aadb03da.tar.gz
emulator-bug-study-5aa276efcbd67f4300ca1a7f809c6e00aadb03da.zip
restructure results
Diffstat (limited to 'results/classifier/zero-shot-user-mode/instruction/1092')
-rw-r--r--results/classifier/zero-shot-user-mode/instruction/109220
1 files changed, 20 insertions, 0 deletions
diff --git a/results/classifier/zero-shot-user-mode/instruction/1092 b/results/classifier/zero-shot-user-mode/instruction/1092
new file mode 100644
index 00000000..9183533b
--- /dev/null
+++ b/results/classifier/zero-shot-user-mode/instruction/1092
@@ -0,0 +1,20 @@
+instruction: 0.942
+runtime: 0.039
+syscall: 0.019
+
+
+
+PPC: `sraw` instructions does not set `ca` and `ca32` flags.
+Description of problem:
+The translation of Power PC instruction `sraw` and `sraw.` don't set the `ca` or `ca32` flags although, according to
+[PowerISA 3.1b](https://files.openpower.foundation/s/dAYSdGzTfW4j2r2) (page 140), they should.
+Additional information:
+This gets particular apparent if compared to `srawi` (which does set `ca`, `ca32`).
+
+**sraw**
+
+https://gitlab.com/qemu-project/qemu/-/blob/master/target/ppc/translate.c#L2914
+
+**srawi**
+
+https://gitlab.com/qemu-project/qemu/-/blob/master/target/ppc/translate.c#L2924