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diff --git a/gitlab/issues/target_arm/host_missing/accel_TCG/734.toml b/gitlab/issues/target_arm/host_missing/accel_TCG/734.toml
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+id = 734
+title = "aarch64 tlb range invalidate is not accurate"
+state = "closed"
+created_at = "2021-11-18T07:58:24.759Z"
+closed_at = "2021-12-15T20:11:57.280Z"
+labels = ["accel: TCG", "target: arm"]
+url = "https://gitlab.com/qemu-project/qemu/-/issues/734"
+host-os = "Ubuntu 20.04"
+host-arch = "x86_64"
+qemu-version = "6.1.9.0 (v6.2.0-rc0)"
+guest-os = "N/A"
+guest-arch = "aarch64"
+description = """In this (https://gitlab.com/qemu-project/qemu/-/commit/84940ed82552d3c7c7327c83076b02cee7978257) commit, tlb range invalidate support is added, and I think qemu's range calculation is wrong.
+
+In `tlbi_aa64_range_get_length` function, `num`, `scale`, `page_size_granule` is caculated as below.
+
+
+```
+    num = extract64(value, 39, 4);
+    scale = extract64(value, 44, 2);
+    page_size_granule = extract64(value, 46, 2);
+
+    page_shift = page_size_granule * 2 + 12;
+```
+
+As [Arm documentation](https://developer.arm.com/documentation/ddi0595/2021-06/AArch64-Instructions/TLBI-RVALE1--TLBI-RVALE1NXS--TLB-Range-Invalidate-by-VA--Last-level--EL1), NUM bits's length is 5, but the code above only extract 4bits.
+
+And `page_shift` also should be calculated as `(page_size_granule-1) <<1) + 12` rather than `page_size_granule * 2 + 12`."""
+reproduce = """1.
+2.
+3."""
+additional = """I found this issue while debugging a phenomenon that kernel panic occurs randomly in my qemu fork.
+
+I'm pretty sure this is one of the causes, but even if I roughly correct it, my problem has not been solved.
+
+I think my problem is TLB invalidate related issue, so if I find any more problems, I'll comment here."""