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Diffstat (limited to 'gitlab/issues/target_sparc/host_missing/accel_missing/1901.toml')
| -rw-r--r-- | gitlab/issues/target_sparc/host_missing/accel_missing/1901.toml | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/gitlab/issues/target_sparc/host_missing/accel_missing/1901.toml b/gitlab/issues/target_sparc/host_missing/accel_missing/1901.toml new file mode 100644 index 00000000..198b1b3f --- /dev/null +++ b/gitlab/issues/target_sparc/host_missing/accel_missing/1901.toml @@ -0,0 +1,27 @@ +id = 1901 +title = "qemu-sparc64 / sparc32plus apparent wrong results from VIS fmul8x16 instruction" +state = "closed" +created_at = "2023-09-22T19:14:54.496Z" +closed_at = "2024-05-06T22:29:26.400Z" +labels = ["target: sparc"] +url = "https://gitlab.com/qemu-project/qemu/-/issues/1901" +host-os = "Gentoo GNU/Linux" +host-arch = "ppc64le" +qemu-version = "qemu-sparc64 version 8.1.50 (v8.1.0-951-gb55e4b9c05); also observed in 8.0.4 release" +guest-os = "N/A" +guest-arch = "SPARC (v9 w/ VIS)" +description = """Experimenting with SPARC emulation, I noticed that the results of the UltraSparc fmul8x16 instruction don't appear to match the behaviour of real silicon (aka it doesn't appear to work at all -- in the test program, the result seems to be always 0). Other VIS instructions I tried seem to be OK (I have not tried all of them). + +The same problem is observed both in 64-bit (qemu-sparc64) and 32-bit (qemu-sparc32plus) applications.""" +reproduce = """1. Compile the attached test program (which exhaustively tests all possible combinations of 16-bit and 8-bit inputs) with gcc: + ``` + sparc64-unknown-linux-gnu-gcc -static -Os -mcpu=ultrasparc -mvis -o test_fmul8x16 test_fmul8x16.c + ``` +2. Run it in qemu-sparc64: + ``` + qemu-sparc64 -cpu 'TI UltraSparc II' ./test_fmul8x16 + ``` +3. Observe almost all tests fail. + + Running the exact same compiled binary on a real UltraSparc II CPU gives all pass results.""" +additional = """[test_fmul8x16.c](/uploads/2bf68e53652fba2ed69ac3ebb3f4b5e9/test_fmul8x16.c)""" |