1 files changed, 74 insertions, 0 deletions
diff --git a/results/classifier/118/architecture-x86/2578 b/results/classifier/118/architecture-x86/2578
new file mode 100644
index 00000000..6d92130d
--- /dev/null
+++ b/results/classifier/118/architecture-x86/2578
@@ -0,0 +1,74 @@
+x86: 0.998
+architecture: 0.922
+graphic: 0.890
+TCG: 0.881
+i386: 0.817
+device: 0.814
+KVM: 0.776
+kernel: 0.765
+network: 0.664
+socket: 0.644
+vnc: 0.579
+arm: 0.557
+peripherals: 0.554
+semantic: 0.512
+ppc: 0.499
+performance: 0.483
+PID: 0.444
+risc-v: 0.429
+register: 0.377
+boot: 0.365
+assembly: 0.347
+permissions: 0.323
+VMM: 0.322
+debug: 0.279
+mistranslation: 0.272
+files: 0.200
+hypervisor: 0.185
+user-level: 0.115
+virtual: 0.077
+--------------------
+x86: 1.000
+i386: 0.998
+kernel: 0.882
+TCG: 0.773
+debug: 0.575
+register: 0.094
+semantic: 0.066
+KVM: 0.055
+assembly: 0.054
+files: 0.037
+architecture: 0.030
+hypervisor: 0.027
+performance: 0.027
+device: 0.013
+user-level: 0.008
+peripherals: 0.006
+PID: 0.006
+VMM: 0.005
+virtual: 0.005
+boot: 0.003
+network: 0.002
+graphic: 0.001
+permissions: 0.001
+socket: 0.001
+ppc: 0.001
+risc-v: 0.001
+vnc: 0.001
+mistranslation: 0.000
+arm: 0.000
+
+x86: exception during hardware interrupt pushes wrong error code
+Description of problem:
+Exceptions during IDT traversal push the wrong error code when triggered by a hardware interrupt.
+The EXT bit in TCG mode is never set.  However, it works fine in KVM mode as hardware is generating the number.
+Steps to reproduce:
+1. load a short IDT e.g. with 64 entries
+2. trigger a self IPI through the LAPIC with a vector 100
+3. the pushed error code is 802 instead of 803.
+Additional information:
+It can be fixed in the lines `raise_exception_err(env, EXCP0D_GPF, intno * 8 + 2);` in `seg_helper.c` 
+which must include the `is_hw` field when calculating the error number. Something like `intno * 8 + 2 + (is_hw != 0)` 
+works here.
+
+Nevertheless, all the other exception cases in the `do_interrupt_*` functions have to set the same bit as well.