summary refs log tree commit diff stats
path: root/results/classifier/118/architecture/1232
diff options
context:
space:
mode:
Diffstat (limited to 'results/classifier/118/architecture/1232')
-rw-r--r--results/classifier/118/architecture/123273
1 files changed, 73 insertions, 0 deletions
diff --git a/results/classifier/118/architecture/1232 b/results/classifier/118/architecture/1232
new file mode 100644
index 00000000..5611cc48
--- /dev/null
+++ b/results/classifier/118/architecture/1232
@@ -0,0 +1,73 @@
+architecture: 0.878
+register: 0.877
+device: 0.861
+graphic: 0.796
+assembly: 0.730
+mistranslation: 0.687
+performance: 0.645
+vnc: 0.616
+PID: 0.563
+semantic: 0.563
+permissions: 0.511
+debug: 0.507
+peripherals: 0.505
+arm: 0.500
+hypervisor: 0.477
+risc-v: 0.477
+user-level: 0.466
+VMM: 0.430
+TCG: 0.415
+network: 0.409
+kernel: 0.381
+x86: 0.378
+ppc: 0.350
+i386: 0.348
+socket: 0.340
+boot: 0.284
+KVM: 0.231
+virtual: 0.210
+files: 0.153
+--------------------
+register: 0.938
+virtual: 0.937
+assembly: 0.721
+debug: 0.653
+architecture: 0.613
+hypervisor: 0.606
+boot: 0.421
+kernel: 0.284
+user-level: 0.100
+TCG: 0.070
+permissions: 0.047
+device: 0.018
+files: 0.014
+VMM: 0.010
+KVM: 0.006
+peripherals: 0.006
+arm: 0.005
+semantic: 0.005
+performance: 0.005
+risc-v: 0.004
+PID: 0.002
+network: 0.001
+vnc: 0.001
+socket: 0.001
+graphic: 0.001
+ppc: 0.001
+x86: 0.001
+mistranslation: 0.000
+i386: 0.000
+
+AArch64 virt can't write to memory related to gicv3
+Description of problem:
+According to the info in generated dtb, the memory-mapped registers of gicv3-distributor have a base addr, which is `0x0800_0000`.
+And I have checked the validity by reading `gicd_typer`, which means the base addr is right.
+
+But when I want to configure the gicv3-distributor (like changing `gicd_ctlr`), the value is not changed, keeping the default value. The same thing happens on any register of GICD in my machine.
+
+**Even I write to this memory by gdb `set` command, the value is also unchangeable.**
+
+The addr of `gicd_ctlr` should be `0x0800_0000`(offset=0), which should be readable and writable, isn't it?
+
+I try to modify the value of this addr in assembly as soon as the **machine starts, without enabling MMU**. 
+This problem should be easier to reproduce.