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Diffstat (limited to 'results/classifier/gemma3:12b/debug/2279')
| -rw-r--r-- | results/classifier/gemma3:12b/debug/2279 | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/results/classifier/gemma3:12b/debug/2279 b/results/classifier/gemma3:12b/debug/2279 new file mode 100644 index 00000000..0773153a --- /dev/null +++ b/results/classifier/gemma3:12b/debug/2279 @@ -0,0 +1,26 @@ + +Debugging with Lauterbach Trace32 -> Cortex-A76, no SP register update +Description of problem: +We do not see changes in the SP_EL1 register value when debugging the QEMU application with Lauterbach Trace32. +Steps to reproduce: +1. Compile bare metal code that uses push and pop instructions (stack). +2. Run QEMU with bare metal code. +3. Connect via Lauterbach Trace32 and check the displayed SP register value. +Additional information: + +This is a screenshot from QEMU 8.0.0, but updating to QEMU 8.2.0 does not resolve the problem. + +I have discussed this with Lauterbach Trace32 support with these results: +- Trace32 uses RSP protocol `p` packets to read some registers, including SP_EL1. GDB seems to use `g` packet. +- QEMU responds to `p` packet with an invalid value, which causes Trace32 to display invalid value. + +Some related RSP protocol logs from Trace32. + + + +Different part of RSP protocol log: +``` +Sending packet: $p20#d2 ... +receiving packet: ec00004000000000 +``` +So it looks like Trace32 can receive different values that zero as response to `p` packet. |