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Diffstat (limited to 'results/classifier/gemma3:12b/peripherals/1353346')
| -rw-r--r-- | results/classifier/gemma3:12b/peripherals/1353346 | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/results/classifier/gemma3:12b/peripherals/1353346 b/results/classifier/gemma3:12b/peripherals/1353346 new file mode 100644 index 00000000..7f575a2d --- /dev/null +++ b/results/classifier/gemma3:12b/peripherals/1353346 @@ -0,0 +1,12 @@ + +ARMv7-M software-triggered interrupts-- unexpected behaviour + +The handling of the NVIC "Software Triggered Interrupt Register" in qemu-2.1.0/hw/intc/armv7m_nvic.c:375 isn't quite right. As things stand, writing a zero to the STIR ends up transferring control to vector table entry zero, which, on ARMv7-M, holds the reset value of the stack pointer. That's what I see with lm3s811evb emulation, and that's not what happens on my STM NUCLEO-F103RB board (Cortex-M3). + +Seems like an oversight-- the handler probably wants armv7m_nvic_set_pending(), not gic_set_pending_private(), and the IRQ number needs 16 added onto it to get the exception number for the interrupt. + +ARM DUI 0552A (Cortex-M3 Devices: Generic User's Guide), p. 134: + "Interrupt ID of the interrupt to trigger, in the range 0-239. For example, a value of 0x03 specifies interrupt IRQ3." + +Cheers, +Boris \ No newline at end of file |