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Diffstat (limited to 'results/classifier/zero-shot-user-mode/output/instruction/1375')
| -rw-r--r-- | results/classifier/zero-shot-user-mode/output/instruction/1375 | 25 |
1 files changed, 0 insertions, 25 deletions
diff --git a/results/classifier/zero-shot-user-mode/output/instruction/1375 b/results/classifier/zero-shot-user-mode/output/instruction/1375 deleted file mode 100644 index 46575271..00000000 --- a/results/classifier/zero-shot-user-mode/output/instruction/1375 +++ /dev/null @@ -1,25 +0,0 @@ -instruction: 0.824 -runtime: 0.129 -syscall: 0.047 - - - -x86 SSE/SSE2/SSE3 instruction semantic bugs with NaN -Description of problem: -The result of SSE/SSE2/SSE3 instructions with NaN is different from the CPU. From Intel manual Volume 1 Appendix D.4.2.2, they defined the behavior of such instructions with NaN. But I think QEMU did not implement this semantic exactly because the byte result is different. -Steps to reproduce: -1. Compile this code -``` -void main() { - asm("mov rax, 0x000000007fffffff; push rax; mov rax, 0x00000000ffffffff; push rax; movdqu XMM1, [rsp];"); - asm("mov rax, 0x2e711de7aa46af1a; push rax; mov rax, 0x7fffffff7fffffff; push rax; movdqu XMM2, [rsp];"); - asm("addsubps xmm1, xmm2"); -} -``` -2. Execute and compare the result with the CPU. This problem happens with other SSE/SSE2/SSE3 instructions specified in the manual, Volume 1 Appendix D.4.2.2. - - CPU - - xmm1[3] = 0xffffffff - - QEMU - - xmm1[3] = 0x7fffffff -Additional information: -This bug is discovered by research conducted by KAIST SoftSec. |