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+semantic: 0.833
+performance: 0.828
+device: 0.796
+graphic: 0.731
+other: 0.657
+debug: 0.627
+network: 0.617
+vnc: 0.565
+permissions: 0.528
+socket: 0.476
+PID: 0.469
+KVM: 0.441
+boot: 0.428
+files: 0.164
+
+Unable to update APIC_TPR when x2APIC is enabled and -global kvm-pit.lost_tick_policy=discard parameter provided
+Description of problem:
+I am developing a custom OS and I wanted to implement x2APIC support. I was able to enable x2APIC, read and write some registers, like APIC_VER and APIC_SIVR. Everything looks good, except that I cannot update APIC_TPR register. Reading it always returns 0. The code I wrote works properly on bare metal. Below some observations:
+
+Scenario 1:
+1. Enable x2APIC
+2. Write to CR8 - success
+3. Read from CR8 - gives correct value
+4. Read from APIC_TPR - gives correct value
+
+Scenario 2:
+1. Enable x2APIC
+2. Read from APIC_TPR - gives 0
+3. Write to APIC_TPR
+4. Read from APIC_TPR - gives 0 again
+
+Scenario 3:
+1. Initialize APIC (LAPIC or xAPIC)
+2. Write to APIC_TPR
+3. Read from APIC_TPR - gives correct value
+4. Switch to x2APIC
+5. Read from APIC_TPR - gives correct value stored in pt. 2
+6. Write to APIC_TPR
+7. Read from APIC_TPR - gives values stored in pt.2, not in point 6!
+
+Looks like APIC_TPR is stuck at value stored there before switching to x2APIC and it cannot be updated with MSR. Only update CR8 works.
+I have checked parameters I passed to qemu. After removing `-global kvm-pit.lost_tick_policy=discard` problem is gone and APIC_TPR is updated correctly.
+Additional information:
+Please let me know if you need additional information.