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mistranslation: 0.884
device: 0.760
semantic: 0.744
instruction: 0.654
network: 0.649
graphic: 0.623
other: 0.565
socket: 0.557
vnc: 0.471
boot: 0.351
assembly: 0.251
KVM: 0.220
Page sizes are not interpreted correctly for E500/E500MC
http://cache.freescale.com/files/32bit/doc/ref_manual/E500CORERM.pdf - see 2.12.5.2 MAS Register 1 (MAS1), p. 2-41
http://cache.freescale.com/files/32bit/doc/ref_manual/E500MCRM.pdf - see 2.16.6.2 MAS Register 1 (MAS1), p. 2-54
According to these documents, variable page size for TLB1 is computed as 4K ** TSIZE.
However, QEMU always treats it as if it was 1K << TSIZE, even if options like "-cpu e500mc" are supplied to qemu.
This is not a bug. MMU v2 (implemented in e6500) extended the TSIZE field so that 1K <<
TSIZE is correct. The extension was on the LSB side so that it works
fine as long as the low bit of the new TSIZE (which is reserved on
e500v2/mc) is zero.
You're absolutely right. Sorry for bothering.
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