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TCG: 0.902
graphic: 0.810
device: 0.749
network: 0.632
architecture: 0.556
semantic: 0.518
performance: 0.505
risc-v: 0.501
ppc: 0.456
socket: 0.456
register: 0.419
files: 0.384
debug: 0.384
PID: 0.377
vnc: 0.374
i386: 0.342
kernel: 0.242
permissions: 0.236
boot: 0.209
x86: 0.190
mistranslation: 0.186
arm: 0.184
peripherals: 0.171
VMM: 0.158
user-level: 0.141
virtual: 0.123
hypervisor: 0.076
assembly: 0.074
KVM: 0.003
--------------------
TCG: 0.879
debug: 0.450
hypervisor: 0.167
user-level: 0.057
virtual: 0.047
files: 0.032
PID: 0.030
performance: 0.028
risc-v: 0.020
semantic: 0.016
register: 0.015
arm: 0.012
x86: 0.009
ppc: 0.008
device: 0.007
assembly: 0.006
kernel: 0.006
architecture: 0.004
peripherals: 0.004
permissions: 0.003
network: 0.002
boot: 0.002
i386: 0.002
vnc: 0.002
VMM: 0.001
socket: 0.001
graphic: 0.001
mistranslation: 0.001
KVM: 0.000
QEMU crashes with failed assertion when executing compressed instructions with C extension support disabled
Description of problem:
When executing compressed instructions with compressed instruction support disabled (c=off), the tcg riscv translations fails an assertion.
```
qemu-system-riscv64: qemu/accel/tcg/translate-all.c:1449: tb_gen_code: Assertion `tb->size != 0' failed.
```
I believe that the issue is caused due to the fact that the compressed instruction without RVC support branch of the `decode_opc` function does not update `ctx->pc_succ_insn`, which causes `ctx->base.pc_next` to not be updated in `riscv_tr_translate_insn`, which then finally triggers the assertion once the tcg generation returns to `tb_gen_code`.
Side note, it also seems like the `gen_exception_illegal` call in the same if case is not needed, since we also call it again at the end of the function.
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