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On ARMv8.4 LSE2 supporting devices remove padding on atomic loadstore
ARMv8.4 LSE2 allows atomics to be unaligned which means we no longer need to proactively backpatch these.
We still need to handle the cross-cacheline case.
Three steps to this.
* Add two new atomic handlers in the signal handler for atomic loads and stores that cross cacheline
* Remove the padding on the TSO loadstores when LSE2 is supported
* Add unit tests for missing atomic loadstore ops that cross cacheline (We already have it for memory atomic ops)
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