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| author | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2014-10-09 17:04:36 +0200 |
|---|---|---|
| committer | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2014-10-09 17:04:36 +0200 |
| commit | 7101a6d9d5998102d0dc6a86ac01ba332fed3506 (patch) | |
| tree | 2981aa9d677f614f0ded8476f6e86c20e6c28107 /example/expression/asm_to_ir.py | |
| parent | 59ef1b1d854cac3e94cd4565a0ac750de9a4c92d (diff) | |
| download | focaccia-miasm-7101a6d9d5998102d0dc6a86ac01ba332fed3506.tar.gz focaccia-miasm-7101a6d9d5998102d0dc6a86ac01ba332fed3506.zip | |
Arch/jit: add endianess support jitters
Diffstat (limited to 'example/expression/asm_to_ir.py')
| -rw-r--r-- | example/expression/asm_to_ir.py | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/example/expression/asm_to_ir.py b/example/expression/asm_to_ir.py index b5fe0ec5..cec32c06 100644 --- a/example/expression/asm_to_ir.py +++ b/example/expression/asm_to_ir.py @@ -39,7 +39,7 @@ for b in blocs: print "symbols:" print symbol_pool -resolved_b, patches = asmbloc.asm_resolve_final(mn_x86, 32, blocs, symbol_pool) +resolved_b, patches = asmbloc.asm_resolve_final(mn_x86, blocs, symbol_pool) # Translate to IR ir_arch = ir_a_x86_32(symbol_pool) |