diff options
| author | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2017-05-07 20:10:38 +0200 |
|---|---|---|
| committer | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2017-05-24 12:23:20 +0200 |
| commit | 11d55f727529de9bbdf88f776584b3cbb7667c20 (patch) | |
| tree | f36e8c5fd1baca6ec60b937c3eba068d74d96aa1 /miasm2/arch/x86/jit.py | |
| parent | d3e5587207f68763ea483c0deeef160b3ebec155 (diff) | |
| download | focaccia-miasm-11d55f727529de9bbdf88f776584b3cbb7667c20.tar.gz focaccia-miasm-11d55f727529de9bbdf88f776584b3cbb7667c20.zip | |
IR: Make IRBlock immutable
Diffstat (limited to 'miasm2/arch/x86/jit.py')
| -rw-r--r-- | miasm2/arch/x86/jit.py | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/miasm2/arch/x86/jit.py b/miasm2/arch/x86/jit.py index 6d9be8ac..9acab5ed 100644 --- a/miasm2/arch/x86/jit.py +++ b/miasm2/arch/x86/jit.py @@ -45,7 +45,7 @@ class jitter_x86_16(jitter): self.ir_arch.irbloc_fix_regs_for_mode = self.ir_archbloc_fix_regs_for_mode def ir_archbloc_fix_regs_for_mode(self, irblock, attrib=64): - self.orig_irbloc_fix_regs_for_mode(irblock, 64) + return self.orig_irbloc_fix_regs_for_mode(irblock, 64) def push_uint16_t(self, value): self.cpu.SP -= self.ir_arch.sp.size / 8 @@ -78,7 +78,7 @@ class jitter_x86_32(jitter): self.ir_arch.irbloc_fix_regs_for_mode = self.ir_archbloc_fix_regs_for_mode def ir_archbloc_fix_regs_for_mode(self, irblock, attrib=64): - self.orig_irbloc_fix_regs_for_mode(irblock, 64) + return self.orig_irbloc_fix_regs_for_mode(irblock, 64) def push_uint32_t(self, value): self.cpu.ESP -= self.ir_arch.sp.size / 8 @@ -183,7 +183,7 @@ class jitter_x86_64(jitter): self.ir_arch.irbloc_fix_regs_for_mode = self.ir_archbloc_fix_regs_for_mode def ir_archbloc_fix_regs_for_mode(self, irblock, attrib=64): - self.orig_irbloc_fix_regs_for_mode(irblock, 64) + return self.orig_irbloc_fix_regs_for_mode(irblock, 64) def push_uint64_t(self, value): self.cpu.RSP -= self.ir_arch.sp.size / 8 |