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| author | Richard Henderson <richard.henderson@linaro.org> | 2021-05-14 10:13:11 -0500 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2021-05-19 12:15:46 -0500 |
| commit | 0046060e5dc232beb4dc942ec76852841739c109 (patch) | |
| tree | 49ecaf83712740564a3daedf7bd6f16848d241e4 | |
| parent | 8ab1e4860b092b93f6c77ef5ffb22b3affe77d62 (diff) | |
| download | focaccia-qemu-0046060e5dc232beb4dc942ec76852841739c109.tar.gz focaccia-qemu-0046060e5dc232beb4dc942ec76852841739c109.zip | |
target/i386: Remove DisasContext.f_st as unused
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-20-richard.henderson@linaro.org>
| -rw-r--r-- | target/i386/tcg/translate.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 4222f09b6f..7e296b39f5 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -101,7 +101,6 @@ typedef struct DisasContext { int vex_v; /* vex vvvv register, without 1's complement. */ CCOp cc_op; /* current CC operation */ bool cc_op_dirty; - int f_st; /* currently unused */ int tf; /* TF cpu flag */ int jmp_opt; /* use direct block chaining for direct jumps */ int repz_opt; /* optimize jumps within repz instructions */ @@ -8507,7 +8506,6 @@ static void i386_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cpu) g_assert(LMA(dc) == ((flags & HF_LMA_MASK) != 0)); g_assert(ADDSEG(dc) == ((flags & HF_ADDSEG_MASK) != 0)); - dc->f_st = 0; dc->tf = (flags >> TF_SHIFT) & 1; dc->cc_op = CC_OP_DYNAMIC; dc->cc_op_dirty = false; |