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| author | Kito Cheng <kito.cheng@sifive.com> | 2021-05-06 00:06:02 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2021-06-08 09:59:43 +1000 |
| commit | 00718208c127315d82f1f1f8383ef29bc478628e (patch) | |
| tree | e8039e2d5595fe6f2f06ff77f1ddc145a0e4500a | |
| parent | eee2d61e202b5bd49a5eb211e347e02c86287ef4 (diff) | |
| download | focaccia-qemu-00718208c127315d82f1f1f8383ef29bc478628e.tar.gz focaccia-qemu-00718208c127315d82f1f1f8383ef29bc478628e.zip | |
target/riscv: reformat @sh format encoding for B-extension
Signed-off-by: Kito Cheng <kito.cheng@sifive.com> Signed-off-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210505160620.15723-2-frank.chang@sifive.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| -rw-r--r-- | target/riscv/insn32.decode | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index 8901ba1e1b..f75642bb0d 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -23,7 +23,7 @@ %rd 7:5 %sh5 20:5 -%sh10 20:10 +%sh7 20:7 %csr 20:12 %rm 12:3 %nf 29:3 !function=ex_plus_1 @@ -59,7 +59,7 @@ @u .................... ..... ....... &u imm=%imm_u %rd @j .................... ..... ....... &j imm=%imm_j %rd -@sh ...... ...... ..... ... ..... ....... &shift shamt=%sh10 %rs1 %rd +@sh ...... ...... ..... ... ..... ....... &shift shamt=%sh7 %rs1 %rd @csr ............ ..... ... ..... ....... %csr %rs1 %rd @atom_ld ..... aq:1 rl:1 ..... ........ ..... ....... &atomic rs2=0 %rs1 %rd @@ -125,9 +125,9 @@ sltiu ............ ..... 011 ..... 0010011 @i xori ............ ..... 100 ..... 0010011 @i ori ............ ..... 110 ..... 0010011 @i andi ............ ..... 111 ..... 0010011 @i -slli 00.... ...... ..... 001 ..... 0010011 @sh -srli 00.... ...... ..... 101 ..... 0010011 @sh -srai 01.... ...... ..... 101 ..... 0010011 @sh +slli 00000. ...... ..... 001 ..... 0010011 @sh +srli 00000. ...... ..... 101 ..... 0010011 @sh +srai 01000. ...... ..... 101 ..... 0010011 @sh add 0000000 ..... ..... 000 ..... 0110011 @r sub 0100000 ..... ..... 000 ..... 0110011 @r sll 0000000 ..... ..... 001 ..... 0110011 @r |