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| author | Anton Johansson <anjo@rev.ng> | 2023-02-27 14:51:52 +0100 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-03-01 07:33:14 -1000 |
| commit | 0489d5bd0607da8d596ce873e5bbd5ea6848bfb4 (patch) | |
| tree | 68764ef722732ac624b4dacfb20060032246833d | |
| parent | 8023d1abcdd42f2f5d171229a2f52c6eb0153f19 (diff) | |
| download | focaccia-qemu-0489d5bd0607da8d596ce873e5bbd5ea6848bfb4.tar.gz focaccia-qemu-0489d5bd0607da8d596ce873e5bbd5ea6848bfb4.zip | |
target/riscv: Replace `tb_pc()` with `tb->pc`
Signed-off-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230227135202.9710-18-anjo@rev.ng> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| -rw-r--r-- | target/riscv/cpu.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 93b52b826c..9eb748a283 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -34,6 +34,7 @@ #include "fpu/softfloat-helpers.h" #include "sysemu/kvm.h" #include "kvm_riscv.h" +#include "tcg/tcg.h" /* RISC-V CPU definitions */ @@ -533,10 +534,12 @@ static void riscv_cpu_synchronize_from_tb(CPUState *cs, CPURISCVState *env = &cpu->env; RISCVMXL xl = FIELD_EX32(tb->flags, TB_FLAGS, XL); + tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL)); + if (xl == MXL_RV32) { - env->pc = (int32_t)tb_pc(tb); + env->pc = (int32_t) tb->pc; } else { - env->pc = tb_pc(tb); + env->pc = tb->pc; } } |