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authorAkihiko Odaki <akihiko.odaki@daynix.com>2024-07-20 18:30:54 +0900
committerPeter Maydell <peter.maydell@linaro.org>2024-07-29 16:06:01 +0100
commit05b8d7249109c44a30352ac86d1f079ec0a8506e (patch)
tree5b44e9b93bda63d6fcb7829ece148ed54c725e35
parente6fd3192edb8178613e61f7f0242a774ad8ffa2c (diff)
downloadfocaccia-qemu-05b8d7249109c44a30352ac86d1f079ec0a8506e.tar.gz
focaccia-qemu-05b8d7249109c44a30352ac86d1f079ec0a8506e.zip
hvf: arm: Do not advance PC when raising an exception
This is identical with commit 30a1690f2402 ("hvf: arm: Do not advance
PC when raising an exception") but for writes instead of reads.

Fixes: a2260983c655 ("hvf: arm: Add support for GICv3")
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--target/arm/hvf/hvf.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c
index adcdfae0b1..c1496ad5be 100644
--- a/target/arm/hvf/hvf.c
+++ b/target/arm/hvf/hvf.c
@@ -1586,10 +1586,10 @@ static int hvf_sysreg_write(CPUState *cpu, uint32_t reg, uint64_t val)
     case SYSREG_ICC_SGI1R_EL1:
     case SYSREG_ICC_SRE_EL1:
         /* Call the TCG sysreg handler. This is only safe for GICv3 regs. */
-        if (!hvf_sysreg_write_cp(cpu, reg, val)) {
-            hvf_raise_exception(cpu, EXCP_UDEF, syn_uncategorized());
+        if (hvf_sysreg_write_cp(cpu, reg, val)) {
+            return 0;
         }
-        return 0;
+        break;
     case SYSREG_MDSCR_EL1:
         env->cp15.mdscr_el1 = val;
         return 0;