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| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-05-22 20:16:15 +0200 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-06-24 16:48:07 +0200 |
| commit | 05d9d0359e6da7dc8255712d745d079a04fa5ae5 (patch) | |
| tree | b2d8e297ad3466988d87e5b30fa161ae0039d0b4 | |
| parent | a071578b93e850dcbebbe2c0cfe86e7977ddffa7 (diff) | |
| download | focaccia-qemu-05d9d0359e6da7dc8255712d745d079a04fa5ae5.tar.gz focaccia-qemu-05d9d0359e6da7dc8255712d745d079a04fa5ae5.zip | |
target/mips: Do not abort on invalid instruction
On real hardware an invalid instruction doesn't halt the world, but usually triggers a RESERVED INSTRUCTION exception. TCG guest code shouldn't abort QEMU anyway. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210617174323.2900831-2-f4bug@amsat.org>
| -rw-r--r-- | target/mips/tcg/translate.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c index 3fd0c48d77..4b7229a868 100644 --- a/target/mips/tcg/translate.c +++ b/target/mips/tcg/translate.c @@ -12151,8 +12151,8 @@ static void gen_branch(DisasContext *ctx, int insn_bytes) tcg_gen_lookup_and_goto_ptr(); break; default: - fprintf(stderr, "unknown branch 0x%x\n", proc_hflags); - abort(); + LOG_DISAS("unknown branch 0x%x\n", proc_hflags); + gen_reserved_instruction(ctx); } } } |