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authorBernhard Beschow <shentey@gmail.com>2023-10-07 14:38:23 +0200
committerMichael S. Tsirkin <mst@redhat.com>2023-10-22 05:18:17 -0400
commit06f6efefe06c7958471cbf84c56ccc87624577d8 (patch)
tree233f166fd1404068b5924494c2bbaa025d05368a
parent9769cfc3e419a704ff1d7feb4621da660903499a (diff)
downloadfocaccia-qemu-06f6efefe06c7958471cbf84c56ccc87624577d8.tar.gz
focaccia-qemu-06f6efefe06c7958471cbf84c56ccc87624577d8.zip
hw/isa/piix4: Remove unused inbound ISA interrupt lines
The Malta board, which is the only user of PIIX4, doesn't connect to the
exported interrupt lines. PIIX3 doesn't expose such interrupt lines
either, so remove them for PIIX4 for simplicity and consistency.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231007123843.127151-16-shentey@gmail.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
-rw-r--r--hw/isa/piix4.c8
1 files changed, 0 insertions, 8 deletions
diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c
index e0b149f8eb..3c3c7a094c 100644
--- a/hw/isa/piix4.c
+++ b/hw/isa/piix4.c
@@ -148,12 +148,6 @@ static void piix4_request_i8259_irq(void *opaque, int irq, int level)
     qemu_set_irq(s->cpu_intr, level);
 }
 
-static void piix4_set_i8259_irq(void *opaque, int irq, int level)
-{
-    PIIX4State *s = opaque;
-    qemu_set_irq(s->isa[irq], level);
-}
-
 static void piix4_rcr_write(void *opaque, hwaddr addr, uint64_t val,
                             unsigned int len)
 {
@@ -197,8 +191,6 @@ static void piix4_realize(PCIDevice *dev, Error **errp)
         return;
     }
 
-    qdev_init_gpio_in_named(DEVICE(dev), piix4_set_i8259_irq,
-                            "isa", ISA_NUM_IRQS);
     qdev_init_gpio_out_named(DEVICE(dev), &s->cpu_intr,
                              "intr", 1);