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| author | Richard Henderson <richard.henderson@linaro.org> | 2023-06-06 10:19:34 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2023-06-06 10:19:34 +0100 |
| commit | 0f08429c4689514f4752454b99d7bd4e23f1cb71 (patch) | |
| tree | 30c64fee64a8b5b3dd89749a543878287fe7b55a | |
| parent | 8d7f954a7f05dc1e537378f14ce4da72c54dc43a (diff) | |
| download | focaccia-qemu-0f08429c4689514f4752454b99d7bd4e23f1cb71.tar.gz focaccia-qemu-0f08429c4689514f4752454b99d7bd4e23f1cb71.zip | |
target/arm: Add commentary for CPUARMState.exclusive_high
Document the meaning of exclusive_high in a big-endian context, and why we can't change it now. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230530191438.411344-2-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | target/arm/cpu.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index d469a2637b..81c0df9c25 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -677,8 +677,16 @@ typedef struct CPUArchState { uint64_t zcr_el[4]; /* ZCR_EL[1-3] */ uint64_t smcr_el[4]; /* SMCR_EL[1-3] */ } vfp; + uint64_t exclusive_addr; uint64_t exclusive_val; + /* + * Contains the 'val' for the second 64-bit register of LDXP, which comes + * from the higher address, not the high part of a complete 128-bit value. + * In some ways it might be more convenient to record the exclusive value + * as the low and high halves of a 128 bit data value, but the current + * semantics of these fields are baked into the migration format. + */ uint64_t exclusive_high; /* iwMMXt coprocessor state. */ |