diff options
| author | Akihiko Odaki <akihiko.odaki@daynix.com> | 2024-06-27 15:07:58 +0900 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2024-07-03 18:14:07 -0400 |
| commit | 107a64b9a360cf5ca046852bc03334f7a9f22aef (patch) | |
| tree | 11a8ae4f1e7c2755938e7adf3746bfb35f154705 | |
| parent | cbd9e5120bac3e292eee77b7a2e3692f235a1a26 (diff) | |
| download | focaccia-qemu-107a64b9a360cf5ca046852bc03334f7a9f22aef.tar.gz focaccia-qemu-107a64b9a360cf5ca046852bc03334f7a9f22aef.zip | |
pcie_sriov: Register VFs after migration
pcie_sriov doesn't have code to restore its state after migration, but
igb, which uses pcie_sriov, naively claimed its migration capability.
Add code to register VFs after migration and fix igb migration.
Fixes: 3a977deebe6b ("Intrdocue igb device emulation")
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20240627-reuse-v10-9-7ca0b8ed3d9f@daynix.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| -rw-r--r-- | hw/pci/pci.c | 7 | ||||
| -rw-r--r-- | hw/pci/pcie_sriov.c | 7 | ||||
| -rw-r--r-- | include/hw/pci/pcie_sriov.h | 2 |
3 files changed, 16 insertions, 0 deletions
diff --git a/hw/pci/pci.c b/hw/pci/pci.c index e32a69f3fa..fa85f87b1c 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -733,10 +733,17 @@ static bool migrate_is_not_pcie(void *opaque, int version_id) return !pci_is_express((PCIDevice *)opaque); } +static int pci_post_load(void *opaque, int version_id) +{ + pcie_sriov_pf_post_load(opaque); + return 0; +} + const VMStateDescription vmstate_pci_device = { .name = "PCIDevice", .version_id = 2, .minimum_version_id = 1, + .post_load = pci_post_load, .fields = (const VMStateField[]) { VMSTATE_INT32_POSITIVE_LE(version_id, PCIDevice), VMSTATE_BUFFER_UNSAFE_INFO_TEST(config, PCIDevice, diff --git a/hw/pci/pcie_sriov.c b/hw/pci/pcie_sriov.c index fae6acea4a..56523ab4e8 100644 --- a/hw/pci/pcie_sriov.c +++ b/hw/pci/pcie_sriov.c @@ -252,6 +252,13 @@ void pcie_sriov_config_write(PCIDevice *dev, uint32_t address, } } +void pcie_sriov_pf_post_load(PCIDevice *dev) +{ + if (dev->exp.sriov_cap) { + register_vfs(dev); + } +} + /* Reset SR/IOV */ void pcie_sriov_pf_reset(PCIDevice *dev) diff --git a/include/hw/pci/pcie_sriov.h b/include/hw/pci/pcie_sriov.h index 5148c5b77d..c5d2d318d3 100644 --- a/include/hw/pci/pcie_sriov.h +++ b/include/hw/pci/pcie_sriov.h @@ -57,6 +57,8 @@ void pcie_sriov_pf_add_sup_pgsize(PCIDevice *dev, uint16_t opt_sup_pgsize); void pcie_sriov_config_write(PCIDevice *dev, uint32_t address, uint32_t val, int len); +void pcie_sriov_pf_post_load(PCIDevice *dev); + /* Reset SR/IOV */ void pcie_sriov_pf_reset(PCIDevice *dev); |