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| author | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | 2022-06-24 14:40:52 +0100 |
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| committer | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | 2022-06-26 18:40:12 +0100 |
| commit | 1d9d4b072db7e1de406122a3012eced157939299 (patch) | |
| tree | 51e5cb9568bd36d419deb38d35be98a5f9154311 | |
| parent | 423bcb234b358a46c868f6baa0483c84870825c5 (diff) | |
| download | focaccia-qemu-1d9d4b072db7e1de406122a3012eced157939299.tar.gz focaccia-qemu-1d9d4b072db7e1de406122a3012eced157939299.zip | |
pl050: add QEMU interface comment
This describes the PL050 device interface implemented within QEMU. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20220624134109.881989-38-mark.cave-ayland@ilande.co.uk> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | hw/input/pl050.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/hw/input/pl050.c b/hw/input/pl050.c index c665a4fc99..ffaa72dea4 100644 --- a/hw/input/pl050.c +++ b/hw/input/pl050.c @@ -7,6 +7,14 @@ * This code is licensed under the GPL. */ +/* + * QEMU interface: + * + sysbus MMIO region 0: MemoryRegion defining the PL050 registers + * + Named GPIO input "ps2-input-irq": set to 1 if the downstream PS2 device + * has asserted its irq + * + sysbus IRQ 0: PL050 output irq + */ + #include "qemu/osdep.h" #include "hw/sysbus.h" #include "migration/vmstate.h" |