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authorBastian Koppelmann <kbastian@mail.uni-paderborn.de>2023-08-28 13:26:50 +0200
committerBastian Koppelmann <kbastian@mail.uni-paderborn.de>2023-09-28 10:45:22 +0200
commit1f22db19533c6e8b01274d12c161c063083e2fba (patch)
treee417afeed6247ca6fd839bfc27f73f0313f135fd
parent222ff2d3581e46731fe19644dfc4c4f36f39ac03 (diff)
downloadfocaccia-qemu-1f22db19533c6e8b01274d12c161c063083e2fba.tar.gz
focaccia-qemu-1f22db19533c6e8b01274d12c161c063083e2fba.zip
target/tricore: Replace cpu_*_code with translator_*
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-ID: <20230828112651.522058-11-kbastian@mail.uni-paderborn.de>
-rw-r--r--target/tricore/translate.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/target/tricore/translate.c b/target/tricore/translate.c
index 7aba7b067c..2107d1fdd4 100644
--- a/target/tricore/translate.c
+++ b/target/tricore/translate.c
@@ -8398,7 +8398,7 @@ static bool insn_crosses_page(CPUTriCoreState *env, DisasContext *ctx)
      * 4 bytes from the page boundary, so we cross the page if the first
      * 16 bits indicate that this is a 32 bit insn.
      */
-    uint16_t insn = cpu_lduw_code(env, ctx->base.pc_next);
+    uint16_t insn = translator_lduw(env, &ctx->base, ctx->base.pc_next);
 
     return !tricore_insn_is_16bit(insn);
 }
@@ -8411,14 +8411,15 @@ static void tricore_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
     uint16_t insn_lo;
     bool is_16bit;
 
-    insn_lo = cpu_lduw_code(env, ctx->base.pc_next);
+    insn_lo = translator_lduw(env, &ctx->base, ctx->base.pc_next);
     is_16bit = tricore_insn_is_16bit(insn_lo);
     if (is_16bit) {
         ctx->opcode = insn_lo;
         ctx->pc_succ_insn = ctx->base.pc_next + 2;
         decode_16Bit_opc(ctx);
     } else {
-        uint32_t insn_hi = cpu_lduw_code(env, ctx->base.pc_next + 2);
+        uint32_t insn_hi = translator_lduw(env, &ctx->base,
+                                           ctx->base.pc_next + 2);
         ctx->opcode = insn_hi << 16 | insn_lo;
         ctx->pc_succ_insn = ctx->base.pc_next + 4;
         decode_32Bit_opc(ctx);