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| author | Aurelien Jarno <aurelien@aurel32.net> | 2015-07-05 17:05:08 +0200 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2015-09-13 23:08:51 +0200 |
| commit | 218fd7301f88df440da3e16b9cfca000cd2fe111 (patch) | |
| tree | 5d21ae0dc56f2d30bcdc1ccb7ace2164f5b8d36a | |
| parent | 7f6bdc431a5c567fca0130d79c8b14f531a0eb14 (diff) | |
| download | focaccia-qemu-218fd7301f88df440da3e16b9cfca000cd2fe111.tar.gz focaccia-qemu-218fd7301f88df440da3e16b9cfca000cd2fe111.zip | |
target-sh4: use deposit in swap.b instruction
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
| -rw-r--r-- | target-sh4/translate.c | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/target-sh4/translate.c b/target-sh4/translate.c index be0cb321cf..50043cf5b5 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -612,15 +612,11 @@ static void _decode_opc(DisasContext * ctx) return; case 0x6008: /* swap.b Rm,Rn */ { - TCGv high, low; - high = tcg_temp_new(); - tcg_gen_andi_i32(high, REG(B7_4), 0xffff0000); - low = tcg_temp_new(); + TCGv low = tcg_temp_new();; tcg_gen_ext16u_i32(low, REG(B7_4)); tcg_gen_bswap16_i32(low, low); - tcg_gen_or_i32(REG(B11_8), high, low); + tcg_gen_deposit_i32(REG(B11_8), REG(B7_4), low, 0, 16); tcg_temp_free(low); - tcg_temp_free(high); } return; case 0x6009: /* swap.w Rm,Rn */ |