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| author | Atish Patra <atishp@rivosinc.com> | 2022-08-16 16:23:21 -0700 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2022-09-07 09:18:33 +0200 |
| commit | 240b363618bdd981333e8ebbb1cb09e702315b0a (patch) | |
| tree | e1f0015f09b3a8169412a975fdf91da55429f9f2 | |
| parent | 25da6e311336b431d8cf1eaa8fe8688b7ee710ed (diff) | |
| download | focaccia-qemu-240b363618bdd981333e8ebbb1cb09e702315b0a.tar.gz focaccia-qemu-240b363618bdd981333e8ebbb1cb09e702315b0a.zip | |
target/riscv: Remove additional priv version check for mcountinhibit
With .min_priv_version, additiona priv version check is uncessary for mcountinhibit read/write functions. Reviewed-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Atish Patra <atishp@rivosinc.com> Message-Id: <20220816232321.558250-7-atishp@rivosinc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| -rw-r--r-- | target/riscv/csr.c | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/target/riscv/csr.c b/target/riscv/csr.c index d81f466c80..4a7078f7d1 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -1494,10 +1494,6 @@ static RISCVException write_mtvec(CPURISCVState *env, int csrno, static RISCVException read_mcountinhibit(CPURISCVState *env, int csrno, target_ulong *val) { - if (env->priv_ver < PRIV_VERSION_1_11_0) { - return RISCV_EXCP_ILLEGAL_INST; - } - *val = env->mcountinhibit; return RISCV_EXCP_NONE; } @@ -1508,10 +1504,6 @@ static RISCVException write_mcountinhibit(CPURISCVState *env, int csrno, int cidx; PMUCTRState *counter; - if (env->priv_ver < PRIV_VERSION_1_11_0) { - return RISCV_EXCP_ILLEGAL_INST; - } - env->mcountinhibit = val; /* Check if any other counter is also monitoring cycles/instructions */ |