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| author | Peter Maydell <peter.maydell@linaro.org> | 2022-03-28 10:16:33 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2022-03-28 10:16:33 +0100 |
| commit | 27fc9f365d6f60ff86c2e2be57289bb47a2be882 (patch) | |
| tree | 6971c36b833750369e9f3ac10c0a653f1d91aecf | |
| parent | 3d31fe4d662f13c70eb7e87f29513623ccd76322 (diff) | |
| parent | bc504838ff88b505421dd28841ee298d9cff31d0 (diff) | |
| download | focaccia-qemu-27fc9f365d6f60ff86c2e2be57289bb47a2be882.tar.gz focaccia-qemu-27fc9f365d6f60ff86c2e2be57289bb47a2be882.zip | |
Merge tag 'pull-ppc-20220326' of https://github.com/legoater/qemu into staging
ppc-7.0 queue: * target/ppc: fix helper_xvmadd* argument order # gpg: Signature made Sat 26 Mar 2022 12:57:54 GMT # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * tag 'pull-ppc-20220326' of https://github.com/legoater/qemu: target/ppc: fix helper_xvmadd* argument order Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | target/ppc/translate/vsx-impl.c.inc | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/target/ppc/translate/vsx-impl.c.inc b/target/ppc/translate/vsx-impl.c.inc index e67fbf2bb8..d1f6333314 100644 --- a/target/ppc/translate/vsx-impl.c.inc +++ b/target/ppc/translate/vsx-impl.c.inc @@ -1324,31 +1324,31 @@ TRANS(XSNMSUBQP, do_xsmadd_X, gen_helper_XSNMSUBQP, gen_helper_XSNMSUBQPO) #define GEN_VSX_HELPER_VSX_MADD(name, op1, aop, mop, inval, type) \ static void gen_##name(DisasContext *ctx) \ { \ - TCGv_ptr xt, xa, b, c; \ + TCGv_ptr xt, s1, s2, s3; \ if (unlikely(!ctx->vsx_enabled)) { \ gen_exception(ctx, POWERPC_EXCP_VSXU); \ return; \ } \ xt = gen_vsr_ptr(xT(ctx->opcode)); \ - xa = gen_vsr_ptr(xA(ctx->opcode)); \ + s1 = gen_vsr_ptr(xA(ctx->opcode)); \ if (ctx->opcode & PPC_BIT32(25)) { \ /* \ * AxT + B \ */ \ - b = gen_vsr_ptr(xT(ctx->opcode)); \ - c = gen_vsr_ptr(xB(ctx->opcode)); \ + s2 = gen_vsr_ptr(xB(ctx->opcode)); \ + s3 = gen_vsr_ptr(xT(ctx->opcode)); \ } else { \ /* \ * AxB + T \ */ \ - b = gen_vsr_ptr(xB(ctx->opcode)); \ - c = gen_vsr_ptr(xT(ctx->opcode)); \ + s2 = gen_vsr_ptr(xT(ctx->opcode)); \ + s3 = gen_vsr_ptr(xB(ctx->opcode)); \ } \ - gen_helper_##name(cpu_env, xt, xa, b, c); \ + gen_helper_##name(cpu_env, xt, s1, s2, s3); \ tcg_temp_free_ptr(xt); \ - tcg_temp_free_ptr(xa); \ - tcg_temp_free_ptr(b); \ - tcg_temp_free_ptr(c); \ + tcg_temp_free_ptr(s1); \ + tcg_temp_free_ptr(s2); \ + tcg_temp_free_ptr(s3); \ } GEN_VSX_HELPER_VSX_MADD(xvmadddp, 0x04, 0x0C, 0x0D, 0, PPC2_VSX) |