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| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-05-05 23:38:36 +0200 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-06-24 16:44:14 +0200 |
| commit | 2838b1d6356044eb240edd4e1b9b5ab5946c5b28 (patch) | |
| tree | 0aa932192f6618fe303f58cef8d552df902c4b6d | |
| parent | d0ac9a61474cf594d19082bc8976247e984ea9a3 (diff) | |
| download | focaccia-qemu-2838b1d6356044eb240edd4e1b9b5ab5946c5b28.tar.gz focaccia-qemu-2838b1d6356044eb240edd4e1b9b5ab5946c5b28.zip | |
target/mips: Fix potential integer overflow (CID 1452921)
Use the BIT_ULL() macro to ensure we use 64-bit arithmetic.
This fixes the following Coverity issue (OVERFLOW_BEFORE_WIDEN):
CID 1452921: Integer handling issues:
Potentially overflowing expression "1 << w" with type "int"
(32 bits, signed) is evaluated using 32-bit arithmetic, and
then used in a context that expects an expression of type
"uint64_t" (64 bits, unsigned).
Fixes: 074cfcb4dae ("target/mips: Implement hardware page table walker")
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210505215119.1517465-1-f4bug@amsat.org>
| -rw-r--r-- | target/mips/tcg/sysemu/tlb_helper.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/target/mips/tcg/sysemu/tlb_helper.c b/target/mips/tcg/sysemu/tlb_helper.c index 259f780d19..a150a014ec 100644 --- a/target/mips/tcg/sysemu/tlb_helper.c +++ b/target/mips/tcg/sysemu/tlb_helper.c @@ -17,6 +17,7 @@ * License along with this library; if not, see <http://www.gnu.org/licenses/>. */ #include "qemu/osdep.h" +#include "qemu/bitops.h" #include "cpu.h" #include "internal.h" @@ -659,7 +660,7 @@ static int walk_directory(CPUMIPSState *env, uint64_t *vaddr, w = directory_index - 1; if (directory_index & 0x1) { /* Generate adjacent page from same PTE for odd TLB page */ - lsb = (1 << w) >> 6; + lsb = BIT_ULL(w) >> 6; *pw_entrylo0 = entry & ~lsb; /* even page */ *pw_entrylo1 = entry | lsb; /* odd page */ } else if (dph) { |