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| author | Peter Maydell <peter.maydell@linaro.org> | 2020-08-28 19:33:18 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-09-01 11:19:32 +0100 |
| commit | 28c28728e53c9f4c13a5cd50f313788c7ec2f9ad (patch) | |
| tree | d0aa1566f9f85e6b30c3a0e7d786ee3232e87452 | |
| parent | ce2d65a5d191380756cdac7a1fd1ba76bd1621cf (diff) | |
| download | focaccia-qemu-28c28728e53c9f4c13a5cd50f313788c7ec2f9ad.tar.gz focaccia-qemu-28c28728e53c9f4c13a5cd50f313788c7ec2f9ad.zip | |
target/arm: Implement VFP fp16 for VMOV immediate
Implement VFP fp16 support for the VMOV immediate insn. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-10-peter.maydell@linaro.org
| -rw-r--r-- | target/arm/translate-vfp.c.inc | 22 | ||||
| -rw-r--r-- | target/arm/vfp.decode | 2 |
2 files changed, 24 insertions, 0 deletions
diff --git a/target/arm/translate-vfp.c.inc b/target/arm/translate-vfp.c.inc index 99b722b75b..c864178ad4 100644 --- a/target/arm/translate-vfp.c.inc +++ b/target/arm/translate-vfp.c.inc @@ -2161,6 +2161,28 @@ MAKE_VFM_TRANS_FNS(hp) MAKE_VFM_TRANS_FNS(sp) MAKE_VFM_TRANS_FNS(dp) +static bool trans_VMOV_imm_hp(DisasContext *s, arg_VMOV_imm_sp *a) +{ + TCGv_i32 fd; + + if (!dc_isar_feature(aa32_fp16_arith, s)) { + return false; + } + + if (s->vec_len != 0 || s->vec_stride != 0) { + return false; + } + + if (!vfp_access_check(s)) { + return true; + } + + fd = tcg_const_i32(vfp_expand_imm(MO_16, a->imm)); + neon_store_reg32(fd, a->vd); + tcg_temp_free_i32(fd); + return true; +} + static bool trans_VMOV_imm_sp(DisasContext *s, arg_VMOV_imm_sp *a) { uint32_t delta_d = 0; diff --git a/target/arm/vfp.decode b/target/arm/vfp.decode index 5c64701dde..c898183771 100644 --- a/target/arm/vfp.decode +++ b/target/arm/vfp.decode @@ -154,6 +154,8 @@ VFMS_dp ---- 1110 1.10 .... .... 1011 .1.0 .... @vfp_dnm_d VFNMA_dp ---- 1110 1.01 .... .... 1011 .0.0 .... @vfp_dnm_d VFNMS_dp ---- 1110 1.01 .... .... 1011 .1.0 .... @vfp_dnm_d +VMOV_imm_hp ---- 1110 1.11 .... .... 1001 0000 .... \ + vd=%vd_sp imm=%vmov_imm VMOV_imm_sp ---- 1110 1.11 .... .... 1010 0000 .... \ vd=%vd_sp imm=%vmov_imm VMOV_imm_dp ---- 1110 1.11 .... .... 1011 0000 .... \ |