diff options
| author | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-11-17 08:18:59 +0000 |
|---|---|---|
| committer | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-11-17 08:18:59 +0000 |
| commit | 295db11371adb11d1117446e79162bbe5ebd046a (patch) | |
| tree | 804d8f51b5e3287a2f2c70bca0393540fd1cea0c | |
| parent | 7820dbf3f0d8ebc44b8dfc0853c8a2c4bd6aea8e (diff) | |
| download | focaccia-qemu-295db11371adb11d1117446e79162bbe5ebd046a.tar.gz focaccia-qemu-295db11371adb11d1117446e79162bbe5ebd046a.zip | |
Add MXCC module reset register (Robert Reif)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3661 c046a42c-6fe2-441c-8c8c-71466251a162
| -rw-r--r-- | target-sparc/op_helper.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c index 09e9c8bf40..9409052f0d 100644 --- a/target-sparc/op_helper.c +++ b/target-sparc/op_helper.c @@ -207,6 +207,14 @@ void helper_ld_asi(int asi, int size, int sign) else DPRINTF_MXCC("%08x: unimplemented access size: %d\n", T0, size); break; + case 0x01c00c00: /* Module reset register */ + if (size == 8) { + ret = env->mxccregs[5] >> 32; + T0 = env->mxccregs[5]; + // should we do something here? + } else + DPRINTF_MXCC("%08x: unimplemented access size: %d\n", T0, size); + break; case 0x01c00f00: /* MBus port address register */ if (size == 8) { ret = env->mxccregs[7]; |