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| author | Nicholas Piggin <npiggin@gmail.com> | 2023-11-13 23:02:45 +1000 |
|---|---|---|
| committer | Nicholas Piggin <npiggin@gmail.com> | 2024-02-23 23:24:43 +1000 |
| commit | 372dbdb90c2cbe391d98649ca1f91a57b268b613 (patch) | |
| tree | 0e632df8ea0aefbfe1be829646f8002f837c8172 | |
| parent | c191ad779372cc3b355ef10a355de8bb9b92efdc (diff) | |
| download | focaccia-qemu-372dbdb90c2cbe391d98649ca1f91a57b268b613.tar.gz focaccia-qemu-372dbdb90c2cbe391d98649ca1f91a57b268b613.zip | |
target/ppc: 4xx don't flush TLB for a newly written software TLB entry
BookE software TLB is implemented by flushing old translations from the relevant TCG TLB whenever software TLB entries change. This means a new software TLB entry should not have any corresponding cached TCG TLB translations, so there is nothing to flush. The exception is multiple software TLBs that cover the same address and address space, but that is a programming error and results in undefined behaviour, and flushing does not give an obviously better outcome in that case either. Remove the unnecessary flush of a newly written software TLB entry. Tested-by: BALATON Zoltan <balaton@eik.bme.hu> Acked-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
| -rw-r--r-- | target/ppc/mmu_helper.c | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index 949ae87f4f..68632bf54e 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -808,13 +808,6 @@ void helper_4xx_tlbwe_hi(CPUPPCState *env, target_ulong entry, tlb->prot & PAGE_WRITE ? 'w' : '-', tlb->prot & PAGE_EXEC ? 'x' : '-', tlb->prot & PAGE_VALID ? 'v' : '-', (int)tlb->PID); - /* Invalidate new TLB (if valid) */ - if (tlb->prot & PAGE_VALID) { - qemu_log_mask(CPU_LOG_MMU, "%s: invalidate TLB %d start " - TARGET_FMT_lx " end " TARGET_FMT_lx "\n", __func__, - (int)entry, tlb->EPN, tlb->EPN + tlb->size); - ppcemb_tlb_flush(cs, tlb); - } } void helper_4xx_tlbwe_lo(CPUPPCState *env, target_ulong entry, |