Merge tag 'pull-hex-20220919' of https://github.com/quic/qemu into staging

Hexagon update
    remove unused encodings
    add fmin/fmax tests for signed zero

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* tag 'pull-hex-20220919' of https://github.com/quic/qemu:
  Hexagon (tests/tcg/hexagon): add fmin/fmax tests for signed zero
  Hexagon (target/hexagon) remove unused encodings

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

2 files changed, 10 insertions, 23 deletions

diff --git a/target/hexagon/imported/encode_pp.def b/target/hexagon/imported/encode_pp.def
index 939c6fc55f..d71c04cd30 100644
--- a/target/hexagon/imported/encode_pp.def
+++ b/target/hexagon/imported/encode_pp.def
@@ -944,13 +944,6 @@ MPY_ENC(F2_dfmpyfix,         "1000","ddddd","0","0","1","0","11")
 MPY_ENC(F2_dfmin,            "1000","ddddd","0","0","1","1","11")
 MPY_ENC(F2_dfmax,            "1000","ddddd","0","1","0","0","11")
 MPY_ENC(F2_dfmpyll,          "1000","ddddd","0","1","0","1","11")
-#ifdef ADD_DP_OPS
-MPY_ENC(F2_dfdivcheat,       "1000","ddddd","0","0","0","1","00")
-
-MPY_ENC(F2_dffixupn,         "1000","ddddd","0","1","0","1","11")
-MPY_ENC(F2_dffixupd,         "1000","ddddd","0","1","1","0","11")
-MPY_ENC(F2_dfrecipa,         "1000","ddddd","0","1","1","1","ee")
-#endif
 
 MPY_ENC(M7_dcmpyrw,          "1000","ddddd","0","0","0","1","10")
 MPY_ENC(M7_dcmpyrwc,         "1000","ddddd","0","0","1","1","10")
@@ -1024,15 +1017,6 @@ MPY_ENC(M5_vdmacbsu,         "1010","xxxxx","0","1","0","0","01")
 
 MPY_ENC(F2_dfmpylh,          "1010","xxxxx","0","0","0","0","11")
 MPY_ENC(F2_dfmpyhh,          "1010","xxxxx","0","0","0","1","11")
-#ifdef ADD_DP_OPS
-MPY_ENC(F2_dfmpyhh,          "1010","xxxxx","0","0","1","0","11")
-MPY_ENC(F2_dffma,            "1010","xxxxx","0","0","0","0","11")
-MPY_ENC(F2_dffms,            "1010","xxxxx","0","0","0","1","11")
-
-MPY_ENC(F2_dffma_lib,        "1010","xxxxx","0","0","1","0","11")
-MPY_ENC(F2_dffms_lib,        "1010","xxxxx","0","0","1","1","11")
-MPY_ENC(F2_dffma_sc,         "1010","xxxxx","0","1","1","1","uu")
-#endif
 
 
 MPY_ENC(M7_dcmpyrw_acc,      "1010","xxxxx","0","0","0","1","10")
@@ -1547,15 +1531,8 @@ SH2_RR_ENC(F2_conv_df2d,      "0000","111","0","0 00","ddddd")
 SH2_RR_ENC(F2_conv_df2ud,     "0000","111","0","0 01","ddddd")
 SH2_RR_ENC(F2_conv_ud2df,     "0000","111","0","0 10","ddddd")
 SH2_RR_ENC(F2_conv_d2df,      "0000","111","0","0 11","ddddd")
-#ifdef ADD_DP_OPS
-SH2_RR_ENC(F2_dffixupr,       "0000","111","0","1 00","ddddd")
-SH2_RR_ENC(F2_dfsqrtcheat,    "0000","111","0","1 01","ddddd")
-#endif
 SH2_RR_ENC(F2_conv_df2d_chop, "0000","111","0","1 10","ddddd")
 SH2_RR_ENC(F2_conv_df2ud_chop,"0000","111","0","1 11","ddddd")
-#ifdef ADD_DP_OPS
-SH2_RR_ENC(F2_dfinvsqrta,     "0000","111","1","0 ee","ddddd")
-#endif
 
 
 
diff --git a/tests/tcg/hexagon/usr.c b/tests/tcg/hexagon/usr.c
index a531511cec..fb4514989c 100644
--- a/tests/tcg/hexagon/usr.c
+++ b/tests/tcg/hexagon/usr.c
@@ -86,6 +86,7 @@ const uint32_t SF_QNaN_neg =         0xffc00000;
 const uint32_t SF_SNaN_neg =         0xffb00000;
 const uint32_t SF_HEX_NaN =          0xffffffff;
 const uint32_t SF_zero =             0x00000000;
+const uint32_t SF_zero_neg =         0x80000000;
 const uint32_t SF_one =              0x3f800000;
 const uint32_t SF_one_recip =        0x3f7f0001;         /* 0.9960...  */
 const uint32_t SF_one_invsqrta =     0x3f7f0000;         /* 0.99609375 */
@@ -100,6 +101,7 @@ const uint64_t DF_QNaN_neg =         0xfff8000000000000ULL;
 const uint64_t DF_SNaN_neg =         0xfff7000000000000ULL;
 const uint64_t DF_HEX_NaN =          0xffffffffffffffffULL;
 const uint64_t DF_zero =             0x0000000000000000ULL;
+const uint64_t DF_zero_neg =         0x8000000000000000ULL;
 const uint64_t DF_any =              0x3f80000000000000ULL;
 const uint64_t DF_one =              0x3ff0000000000000ULL;
 const uint64_t DF_one_hh =           0x3ff001ff80000000ULL;     /* 1.00048... */
@@ -933,6 +935,8 @@ int main()
     TEST_R_OP_RR(sfmin,  SF_QNaN,     SF_one,         SF_one,       USR_CLEAR);
     TEST_R_OP_RR(sfmin,  SF_SNaN,     SF_QNaN,        SF_HEX_NaN,   USR_FPINVF);
     TEST_R_OP_RR(sfmin,  SF_QNaN,     SF_SNaN,        SF_HEX_NaN,   USR_FPINVF);
+    TEST_R_OP_RR(sfmin,  SF_zero,     SF_zero_neg,    SF_zero_neg,  USR_CLEAR);
+    TEST_R_OP_RR(sfmin,  SF_zero_neg, SF_zero,        SF_zero_neg,  USR_CLEAR);
 
     TEST_R_OP_RR(sfmax,  SF_one,      SF_small_neg,   SF_one,       USR_CLEAR);
     TEST_R_OP_RR(sfmax,  SF_one,      SF_SNaN,        SF_one,       USR_FPINVF);
@@ -941,6 +945,8 @@ int main()
     TEST_R_OP_RR(sfmax,  SF_QNaN,     SF_one,         SF_one,       USR_CLEAR);
     TEST_R_OP_RR(sfmax,  SF_SNaN,     SF_QNaN,        SF_HEX_NaN,   USR_FPINVF);
     TEST_R_OP_RR(sfmax,  SF_QNaN,     SF_SNaN,        SF_HEX_NaN,   USR_FPINVF);
+    TEST_R_OP_RR(sfmax,  SF_zero,     SF_zero_neg,    SF_zero,      USR_CLEAR);
+    TEST_R_OP_RR(sfmax,  SF_zero_neg, SF_zero,        SF_zero,      USR_CLEAR);
 
     TEST_R_OP_RR(sfadd,  SF_one,      SF_QNaN,        SF_HEX_NaN,   USR_CLEAR);
     TEST_R_OP_RR(sfadd,  SF_one,      SF_SNaN,        SF_HEX_NaN,   USR_FPINVF);
@@ -1003,6 +1009,8 @@ int main()
     TEST_P_OP_PP(dfmin,  DF_QNaN,   DF_any,          DF_any,        USR_CLEAR);
     TEST_P_OP_PP(dfmin,  DF_SNaN,   DF_QNaN,         DF_HEX_NaN,    USR_FPINVF);
     TEST_P_OP_PP(dfmin,  DF_QNaN,   DF_SNaN,         DF_HEX_NaN,    USR_FPINVF);
+    TEST_P_OP_PP(dfmin,  DF_zero,   DF_zero_neg,     DF_zero_neg,   USR_CLEAR);
+    TEST_P_OP_PP(dfmin,  DF_zero_neg, DF_zero,       DF_zero_neg,   USR_CLEAR);
 
     TEST_P_OP_PP(dfmax,  DF_any,    DF_small_neg,    DF_any,        USR_CLEAR);
     TEST_P_OP_PP(dfmax,  DF_any,    DF_SNaN,         DF_any,        USR_FPINVF);
@@ -1011,6 +1019,8 @@ int main()
     TEST_P_OP_PP(dfmax,  DF_QNaN,   DF_any,          DF_any,        USR_CLEAR);
     TEST_P_OP_PP(dfmax,  DF_SNaN,   DF_QNaN,         DF_HEX_NaN,    USR_FPINVF);
     TEST_P_OP_PP(dfmax,  DF_QNaN,   DF_SNaN,         DF_HEX_NaN,    USR_FPINVF);
+    TEST_P_OP_PP(dfmax,  DF_zero,   DF_zero_neg,     DF_zero,       USR_CLEAR);
+    TEST_P_OP_PP(dfmax,  DF_zero_neg, DF_zero,       DF_zero,       USR_CLEAR);
 
     TEST_XP_OP_PP(dfmpyhh, DF_one,   DF_one,  DF_one,   DF_one_hh,  USR_CLEAR);
     TEST_XP_OP_PP(dfmpyhh, DF_zero,  DF_any,  DF_QNaN,  DF_HEX_NaN, USR_CLEAR);